IDT79RC32332 IDT [Integrated Device Technology], IDT79RC32332 Datasheet - Page 20

• Manufacturer Part Number: IDT79RC32332
• Description: IDT Interprise Integrated Communications Processor
• Manufacturer: IDT [Integrated Device Technology]

IDT 79RC32355
Memory and Peripheral Bus - Device Access
MDATA[31:0]
WAITACKN, BRN
MADDR[21:0]
MADDR[25:22]
BDIRN, BOEN[0]
BGN, BWEN[3:0], OEN,
RWN
CSN[3:0]
CSN[5:4]
Note: The RC32355 provides bus turnaround cycles to prevent bus contention when going from a read to write, write to read, and during
external bus ownership. For example, there are no cycles where an external device and the RC32355 are both driving. See the chapters
“Device Controller,” “Synchronous DRAM Controller,” and “Bus Arbitration” in the RC32355 User Reference Manual.
Signal
Symbol
Thld1
Tsu1
Tdo1
Tdz1
Tzd1
Tdo2
Tdz2
Tzd2
Tdo3
Tdz3
Tzd3
Tdo4
Tdz4
Tzd4
Tdo5
Tdz5
Tzd5
Tdo6
Tdz6
Tzd6
Tdo7
Tdz7
Tzd7
Thld
Tsu
Table 6 Memory and Peripheral Bus AC Timing Characteristics (Part 2 of 2)
Reference
CLKP rising
CLKP rising
CLKP rising
CLKP rising
CLKP rising
CLKP rising
CLKP rising
CLKP rising
Edge
133MHz
Min
2.5
1.5
2.0
2.0
2.5
1.5
2.0
2.0
2.5
2.0
2.0
2.0
2.0
2.0
1.7
2.0
2.5
2.0
—
—
—
—
—
—
—
Max
6.5
9.0
6.0
9.0
6.5
9.0
6.0
9.0
6.0
9.0
5.0
9.0
6.0
9.0
20 of 47
—
—
—
—
—
—
—
—
—
—
—
150MHz
Min
2.5
1.5
2.0
2.0
2.5
1.5
2.0
2.0
2.5
2.0
2.0
2.0
2.0
2.0
1.7
2.0
2.5
2.0
—
—
—
—
—
—
—
Max
6.5
9.0
6.0
9.0
6.5
9.0
6.0
9.0
6.0
9.0
5.0
9.0
6.0
9.0
—
—
—
—
—
—
—
—
—
—
—
180MHz
Min
2.5
1.5
2.0
2.0
2.5
1.5
2.0
2.0
2.5
2.0
2.0
2.0
2.0
2.0
1.7
2.0
2.5
2.0
—
—
—
—
—
—
—
Max
6.5
9.0
6.0
9.0
6.5
9.0
6.0
9.0
6.0
9.0
5.0
9.0
6.0
9.0
—
—
—
—
—
—
—
—
—
—
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Conditions
Figure 11
Figure 12
Reference
May 25, 2004
Diagram
Timing