IDT79RC32332 IDT [Integrated Device Technology], IDT79RC32332 Datasheet - Page 36

• Manufacturer Part Number: IDT79RC32332
• Description: IDT Interprise Integrated Communications Processor
• Manufacturer: IDT [Integrated Device Technology]

EJTAG and JTAG
JTAG_TCK
EJTAG_DCLK
JTAG_TMS, JTAG_TDI,
JTAG_TRST_N
JTAG_TDO
JTAG_TRST_N
EJTAG_PCST[2:0]
IDT 79RC32355
1.
2.
EJTAG_DCLK is equal to the internal CPU pipeline clock.
A negative delay denotes the amount of time before the reference clock edge.
JTAG_TCK
EJTAG_DCLK
JTAG_TMS,
JTAG_TDI
JTAG_TDO
EJTAG_PCST
Signal
EJTAG_TRST_N
JTAG_TRST_N
1
Thigh1, Tlow1
Thigh2, Tlow2
Trise1, Tfall1
Trise2, Tfall2
Symbol
Tperiod1
Tperiod2
Thld3
Tpw6
Tsu3
Tdo4
Tdo5
Tsu6
Tdo7
Trise1
TDO
Tdo4
EJTAG_DCLK rising -0.7
EJTAG_DCLK rising -0.3
JTAG_TCK falling
JTAG_TCK rising
JTAG_TCK rising
Reference
Tpw6
Edge
none
none
none
Tlow1
Table 15 JTAG AC Timing Characteristics
Figure 20 JTAG AC Timing Waveform
Tperiod1
Tsu3
Min
133MHz
100
100
7.5
3.0
2.0
2.5
1.0
40
—
—
2
2
2
Tsu6
Tfall1
Thld3
36 of 47
Max
10.0
12.0
3.5
1.0
3.3
—
—
—
—
—
—
—
TDO
5
Thigh1
-0.7
-0.3
Min
150MHz
100
100
6.7
2.5
3.0
1.0
40
—
—
2
2
2
2
Max
10.0
12.0
3.5
1.0
3.3
—
—
—
—
—
—
—
5
Trise2
-0.7
-0.3
180MHz
Min
100
100
5.6
2.5
3.0
1.0
40
—
—
2
2
2
2
Tdo7
Tdo5
Max
10.0
12.0
3.5
1.0
3.3
—
—
—
—
—
—
—
Thigh2
5
Tfall2
EJTAG TPC, TCST capture
Unit Conditions
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
PCST
TPC
Tperiod2
Tlow2
May 25, 2004
Figure 20
Reference
Diagram
Timing