UPD16488AP NEC [NEC], UPD16488AP Datasheet - Page 21

• Manufacturer Part Number: UPD16488AP
• Description: 1/92 DUTY LCD CONTROLLER/DRIVER WITH FOUR-LEVEL GRAY SCALE, ON-CHIP RAM
• Manufacturer: NEC [NEC]

5.2.3 Column address circuit
Figure 5-4.
inverted using the ADC flag in control register 1 (R0) (segment driver direction selection flag). This reduces the constraints
on chip layout when assembling the LCD module.
5.2.4 Y address circuit
Y address increment mode (INC = 1: control register 2 (R1)), the specified Y address is incremented (by 1) each time a
display data read or write operation is executed. The CPU is able to continuously access the display data. The Y address
is incremented to 7FH, after which the X address is incremented after each read or write operation and the Y address is set
back to 00H.
5.2.5 Common scan circuit
register 1 (R0), as shown in Table 5-2.
the scan direction is COM
5.2.6 Display start line set
the contents of display data RAM. The display start line setting register (R12) is used to specify the top line in the display.
The screen can be scrolled, overwritten, etc. A 7-bit display start address is set to the display start line setting register.
5.2.7 Display data latch circuit
data so that there is no effect on the data in the display data RAM.
When displaying the contents of the display data RAM, the column address corresponds to the SEG output, as shown in
As is shown in Table 5-1, the correspondence between the display RAM's column address and segment output can be
As is shown in Figure 5-4, the Y address register (R4) is used to specify the display data RAM's Y address. When using
The common scan circuit sets the scan lines for common signals. The scan direction is set using the COMR flag in control
For example, when using 1/80 duty, when COMR = L the scan direction is COM
As is shown in Figure 5-4, display start line set specifies the Y address that corresponds to the COM
The display data latch circuit is used for temporary storage of data that is output to the LCD driver from the display data RAM.
The display scan command that sets normal or reverse display mode and the display ON/OFF command control latched
Table 5-2. Relationship between Common Scan Circuit and Scan Direction
ADC
(D
1
Table 5-1. Relationship between Column Address and SEG Output
SEG Output
)
80
COM
COMR
(D
0
0
1
)
1
using the COM
SEG
00H
7FH
0
1
1
Data Sheet S15745EJ2V0DS
COM
COM
80
to COM
92
1
Column address
Column address
1
pins.
1
COM
COM
COM
92
1
80
SEG
7FH
00H
and when COMR = H,
128
1
output for displaying
PD16488A
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