sii3114 Silicon image, sii3114 Datasheet - Page 80

• Manufacturer Part Number: sii3114
• Description: Pci To Serial Ata Controller
• Manufacturer: Silicon image

SiI3114 PCI to Serial ATA Controller
Data Sheet
SIEN
Address Offset: 148
Access Type: Read/Write
Reset Value: 0x0000_0000
This register contains bits for enabling interrupts.
SiI-DS-0103-D
• Bit[18:14] : Reserved. The values of these bits should not be changed from their defaults otherwise erratic
• Bit[13] : Tx_Swing_0: This bit, together with Tx_Swing_1, sets the nominal output swing for the Transmitter.
• Bit[12:0] : Reserved. The values of these bits should not be changed from their defaults otherwise erratic
• Bit [31:30] : Reserved (R). This bit field is reserved and returns zeros on a read.
• Bit [29] : Transmit_OK – This bit enables an interrupt upon the assertion of the Transmit_OK bit in the
• Bit [28] : IFIS_OK – This bit enables an interrupt upon the assertion of the IFIS_OK bit in the SMisc
• Bit [27] : IntrlckFIS – This bit enables an interrupt upon the assertion of the IntrlckFIS bit in the SMisc
• Bit [26] : PMCHG – This bit enables an interrupt upon a Power Management Mode change. The interrupt is
• Bit [25] : F – This bit enables an interrupt upon the assertion of the F bit in the DIAG field of the SError
• Bit [24] : Reserved (R). This bit is reserved and returns zero on a read.
• Bit [23] : SDB – This bit enables an interrupt upon the assertion of the SDB bit in the SMisc register.
• Bit [22] : H – This bit enables an interrupt upon the assertion of the H bit in the DIAG field of the SError
• Bit [21] : C – This bit enables an interrupt upon the assertion of the C bit in the DIAG field of the SError
• Bit [20] : pterr – This bit enables the Pterr interrupt reported in SMisc bit 22.
• Bit [19] : B – This bit enables an interrupt upon the assertion of the B bit in the DIAG field of the SError
• Bit [18] : W – This bit enables an interrupt upon the assertion of the W bit in the DIAG field of the SError
• Bit [17] : Reserved (R). This bit is reserved and returns zeros on a read.
• Bit [16] : N – This bit enables an interrupt upon the assertion of the N bit in the DIAG field of the SError
• Bit [15:00] : Reserved (R). This bit field is reserved and returns zeros on a read.
operation may result
The available combinations are as follows:
operation may result.
SMisc register.
register.
register.
reported in bit 6 of SMisc.
register.
register.
register.
register.
register.
register.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
Tx_Swing_1 Tx_Swing_0
0
0
1
1
H
/ 1C8
F
H
/ 348
0
1
0
1
H
/ 3C8
H
C
Nominal Output Swing
H
B
W
500mV
600mV
700mV
800mV
N
72
Reserved
© 2007 Silicon Image, Inc.
Silicon Image, Inc.