LTC1400 LINER [Linear Technology], LTC1400 Datasheet - Page 12

• Manufacturer Part Number: LTC1400
• Description: Complete SO-8, 12-Bit, 400ksps ADC with Shutdown
• Manufacturer: LINER [Linear Technology]

LTC1400
Figure 11 shows the recommended system ground con-
nections. All analog circuitry grounds should be termi-
12
APPLICATIONS
Input signal leads to A
(Pin 4) should be kept as short as possible to minimize
noise coupling. In applications where this is not possible,
a shielded cable between source and ADC is recom-
mended. Also, since any potential difference in grounds
between the signal source and ADC appears as an error
voltage in series with the input signal, attention should be
paid to reducing the ground circuit impedance as much as
possible.
REFRDY
SLEEP
CONV
V
CLK
NAP
REF
–5V
V
SS
ANALOG SUPPLY
Figure 11. Power Supply Connection
LTC1400
+
GND
GND
U
IN
+
5V
and signal return leads from GND
V
CC
INFORMATION
U
NOTE: NAP AND SLEEP ARE INTERNAL SIGNALS. REFRDY APPEARS AS A BIT IN THE D
GND
GND
DIGITAL CIRCUITRY
DIGITAL SUPPLY
W
Figure 12. Nap Mode and Sleep Mode Waveforms
t
1
+
LTC1400 • F11
V
5V
U
CC
nated at the LTC1400 GND pin. The ground return from the
LTC1400 Pin 4 to the power supply should be low imped-
ance for noise free operation. Digital circuitry grounds
must be connected to the digital supply common.
In applications where the ADC data outputs and control
signals are connected to a continuously active micropro-
cessor bus, it is possible to get errors in the conversion
results. These errors are due to feedthrough from the
microprocessor to the successive approximation com-
parator. The problem can be eliminated by forcing the
microprocessor into a Wait state during conversion or by
using three-state buffers to isolate the ADC data bus.
Power-Down Mode
Upon power-up, the LTC1400 is initialized to the active
state and is ready for conversion. However, the chip can be
easily placed into the Nap or Sleep mode by exercising the
right combination of CLK and CONV signal. In the Nap
mode all power is off except the internal reference, which
is still active and provides 2.42V output voltage to the
other circuitry. In this mode, the ADC draws only 6mW of
power instead of 75mW (for minimum power, the logic
inputs must be within 500mV of the supply rails). The
wake-up time from the Nap mode to the active mode is
t
1
OUT
WORD.
LTC1400 • F08