LTC1400 LINER [Linear Technology], LTC1400 Datasheet - Page 6

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LTC1400

Manufacturer Part Number
LTC1400
Description
Complete SO-8, 12-Bit, 400ksps ADC with Shutdown
Manufacturer
LINER [Linear Technology]
Datasheet

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FUNCTIONAL BLOCK DIAGRA
TEST CIRCUITS
LTC1400
PIN
V
tantalum in parallel with 0.1 F ceramic).
A
(Bipolar).
V
(10 F tantalum in parallel with 0.1 F ceramic).
GND (Pin 4): Ground. GND should be tied directly to an
analog ground plane.
D
this pin.
6
CC
IN
REF
OUT
U
(Pin 2): Analog Input. 0V to 4.096V (Unipolar), 2.048V
U
(Pin 1): Positive Supply, 5V. Bypass to GND (10 F
(Pin 5): The A/D conversion result is shifted out from
(Pin 3): 2.42V Reference Output. Bypass to GND
FUNCTIONS
U
U
U
CONV
D
V
CLK
OUT
A
REF
IN
Hi-Z TO V
V
3k
V
CONTROL
OH
OL
LOGIC
TO V
TO Hi-Z
2.42V REF
OH
OH
C
LOAD
SUCCESSIVE APPROXIMATION
W
REGISTER/PARALLEL TO
12-BIT CAPACITIVE DAC
SERIAL CONVERTER
C
SAMPLE
12
CLK (Pin 6): Clock. This clock synchronizes the serial data
transfer. A minimum CLK pulse of 50ns will cause the ADC
to wake up from Nap or Sleep mode.
CONV (Pin 7): Conversion Start Signal. This active high
signal starts a conversion on its rising edge. Keeping CLK
low and pulsing CONV two/four times will put the ADC into
Nap/Sleep mode.
V
Bypass to GND with 0.1 F ceramic. V
GND for unipolar operation.
SS
(Pin 8): Negative Supply. – 5V for bipolar operation.
D
OUT
ZEROING SWITCH
Hi-Z TO V
V
V
COMP
OL
OH
5V
TO Hi-Z
TO V
3k
C
OL
OL
LOAD
LTC1400 • TC01
LTC1400 • BD01
V
GND
V
D
CC
SS
OUT
SS
should be tied to

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