LTC1400 LINER [Linear Technology], LTC1400 Datasheet - Page 4

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LTC1400

Manufacturer Part Number
LTC1400
Description
Complete SO-8, 12-Bit, 400ksps ADC with Shutdown
Manufacturer
LINER [Linear Technology]
Datasheet

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DIGITAL I PUTS AND OUTPUTS
LTC1400
SYMBOL PARAMETER
TI I G CHARACTERISTICS
The
temperature range; all other limits and typicals T
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: All voltage values are with respect to GND.
Note 3: When these pin voltages are taken below V
mode) or above V
can handle input currents greater than 40mA below V
unipolar mode) or above V
Note 4: When these pin voltages are taken below V
mode), they will be clamped by internal diodes. This product can handle
input currents greater than 40mA below V
without latch-up. These pins are not clamped to V
Note 5: V
specified.
4
SYMBOL
f
t
t
f
t
t
t
t
t
t
t
t
t
t
t
t
I
C
I
I
SAMPLE(MAX)
CONV
ACQ
CLK
CLK
WK(NAP)
1
2
3
4
5
6
7
8
9
10
OZ
SOURCE
SINK
OZ
W U
denotes specifications which apply over the full operating
CC
Hi-Z Output Leakage D
Hi-Z Output Capacitance D
Output Source Current
Output Sink Current
= 5V, f
PARAMETER
Maximum Sampling Frequency
Conversion Time
Acquisition Time (Unipolar Mode)
CLK Frequency
CLK Pulse Width
Time to Wake Up from Nap Mode
CLK Pulse Width to Return to Active Mode
CONV to CLK Setup Time
CONV After Leading CLK
CONV Pulse Width
Time from CLK to Sample Mode
Aperture Delay of Sample-and-Hold
Minimum Delay Between Conversion (Unipolar Mode)
Delay Time, CLK to D
Delay Time, CLK to D
Time from Previous Data Remains Valid After CLK
CC
SAMPLE
, they will be clamped by internal diodes. This product
U
= 400kHz, t
CC
without latch-up.
OUT
(Bipolar Mode V
r
OUT
U
OUT
= t
OUT
SS
f
(Note 7)
= 5ns unless otherwise
Valid
Hi-Z
(ground for unipolar mode)
A
CC
= 25 C.
SS
SS
SS
.
SS
(ground for unipolar
(ground for unipolar
= – 5V)
(Bipolar Mode V
(ground for
(Note 5)
CONDITIONS
V
V
V
OUT
OUT
OUT
(Note 5)
= 0V to V
= 0
= V
SS
CC
= – 5V)
CC
Note 6: Recommended operating conditions.
Note 7: Guaranteed by design, not subject to test.
Note 8: Linearity, offset and full-scale specifications apply for unipolar and
bipolar modes.
Note 9: Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 10: Bipolar offset is the offset voltage measured from – 0.5LSB when
the output code flickers between 0000 0000 0000 and 1111 1111 1111.
Note 11: The rising edge of CONV starts a conversion. If CONV returns
low at a bit decision point during the conversion, it can create small errors.
For best performance ensure that CONV returns low either within 120ns
after conversion starts (i.e., before the first bit decision) or after the 14
clock cycle. (Figure 13 Timing Diagram).
CONDITIONS
(Note 6)
f
(Note 7)
(Note 7)
(Note 7)
(Note 11)
(Note 7)
Jitter < 50ps (Note 7)
C
C
C
CLK
LOAD
LOAD
LOAD
= 6.4MHz
= 20pF
= 20pF
= 20pF
MIN
MIN
400
0.1
50
50
80
50
14
0
TYP
– 10
TYP
230
200
350
265
235
15
10
80
45
40
40
25
MAX
MAX
300
270
385
355
2.1
6.4
65
80
80
10
UNITS
UNITS
MHz
mA
mA
kHz
pF
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
A
s

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