S29CD-J_12 SPANSION [SPANSION], S29CD-J_12 Datasheet - Page 61

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S29CD-J_12

Manufacturer Part Number
S29CD-J_12
Description
Manufacturer
SPANSION [SPANSION]
Datasheet
October 11, 2012 S29CD-J_CL-J_00_B7
Note
All commands have the same number of cycles in both asynchronous and synchronous modes, including the READ/RESET command. Only
a single array access occurs after the F0h command is entered. All subsequent accesses are burst mode when the burst mode option is
enabled in the Configuration Register.
IND/WAIT#
Addresses
Addresses
CE#
Data
ADV#
ADV#
CLK
OE#
IND#
WE#
Data
OE#
CE#
CLK
Valid Address
t
ADVCS
t
AAVS
t
t
CES
AS
D a t a
Valid Address
Figure 18.5 Synchronous Command Write/Read Timing
t
S29CD-J and S29CL-J Flash Family
ADVP
t
t
Data In
DS
AAVH
Aa
t
t
WADVH1
WP
t
Figure 18.4 Burst Mode Read (x32 Mode)
CES
t
IACC
S h e e t
t
ADVCS
t
BDH
t
DH
10 ns
t
ADVCH
t
WADVS
t
WADVH2
Da
t
OE
Da+1
Valid Address
t
BACC
t
WC
Da+2
t
OE
Da + 3
t
INDS
Data Out
t
Da + 7
EHQZ
t
CEZ
t
t
OEZ
DF
t
INDH
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