S29CD-J_12 SPANSION [SPANSION], S29CD-J_12 Datasheet - Page 62
![no-image](/images/no-image-200.jpg)
S29CD-J_12
Manufacturer Part Number
S29CD-J_12
Description
Manufacturer
SPANSION [SPANSION]
Datasheet
1.S29CD-J_12.pdf
(81 pages)
- Current page: 62 of 81
- Download datasheet (4Mb)
18.4
Note
62
Not 100% tested.
JEDEC
Hardware Reset (RESET#)
Parameter
CE#, OE#
CE#, OE#
t
t
RESET#
RESET#
t
READY2
READY3
RY/BY#
RY/BY#
READY
Std.
t
t
RPD
t
t
RP
RH
RB
RESET# Pin Low (During embedded Algorithms) to Read or
Write
RESET# Pin Low (Not during embedded Algorithms) to Read or
Write
RESET# Pulse Width
RESET# High time Before Read
RESET# Low to Standby Mode
RY/BY # Recovery Time
RESET # Active for Bank NOT Executing Algorithm
(See Note)
(See Note)
Table 18.4 Hardware Reset (RESET#)
S29CD-J and S29CL-J Flash Family
Reset Timing to Bank NOT Executing Embedded Algorithm
t
READY2
Reset Timing to Bank Executing Embedded Algorithm
t
t
RP
RP
Description
Figure 18.6 RESET# Timings
(See Note)
t
D a t a
READY
t
RH
S h e e t
S29CD-J_CL-J_00_B7 October 11, 2012
Setup
Test
Max
Min
Min
Min
Min
Min
Min
t
RB
All Speed
Options
500
500
500
11
50
20
0
Unit
µs
ns
ns
ns
µs
ns
ns
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