PALCE20V8H-25PC/4 Lattice Semiconductor, PALCE20V8H-25PC/4 Datasheet - Page 20

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PALCE20V8H-25PC/4

Manufacturer Part Number
PALCE20V8H-25PC/4
Description
EE CMOS 24-Pin Universal Programmable Array Logic
Manufacturer
Lattice Semiconductor
Datasheet

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TYPICAL I
V
The selected “typical” pattern utilized 50% of the device resources. Half of the macrocells were programmed as registered, and the
other half were programmed as combinatorial. Half of the available product terms were used for each macrocell. On any vector, half
of the outputs were switching.
By utilizing 50% of the device, a midpoint is defined for I
estimate the I
20
CC
= 5 V, T
150
125
100
CC
75
50
25
0
CC
A
requirements for a particular design.
0
= 25°C
CHARACTERISTICS
10
20
PALCE20V8 Family
I
CC
CC
. From this midpoint, a designer may scale the I
vs. Frequency
Frequency (MHz)
30
40
50
20V8H-5
20V8H-7
20V8H-10
20V8H-15/25
CC
20V8Q-15/25
graphs up or down to
16491E-11

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