CY7C008 CYPRESS [Cypress Semiconductor], CY7C008 Datasheet - Page 13

• Manufacturer Part Number: CY7C008
• Description: 64K/128K x 8/9 Dual-Port Static RAM
• Manufacturer: CYPRESS [Cypress Semiconductor]

Switching Waveforms
Busy Timing Diagram No. 2 (Address Arbitration)
Left Address Valid First:
Document #: 38-06041 Rev. *C
Busy Timing Diagram No. 1 (CE Arbitration)
CE
CE
Right Address Valid First:
Note:
40. If t
L
ADDRESS
ADDRESS
R
Valid First:
ADDRESS
ADDRESS
ADDRESS
ADDRESS
Valid First:
PS
BUSY
BUSY
BUSY
BUSY
is violated, the busy signal will be asserted on one side or the other, but there is no guarantee to which side BUSY will be asserted.
CE
CE
CE
CE
L,R
L,R
R
R
R
L
R
L
L
L
R
R
L
L
(continued)
t
t
PS
PS
ADDRESS MATCH
ADDRESS MATCH
t
t
RC
RC
or t
or t
t
t
PS
PS
WC
WC
t
t
[40]
BLA
BLA
ADDRESS MATCH
ADDRESS MATCH
[40]
t
t
BLC
BLC
ADDRESS MISMATCH
ADDRESS MISMATCH
t
t
BHA
BHA
t
t
BHC
BHC
CY7C008/009
CY7C018/019
Page 13 of 19