CAT5241YI-10 ONSEMI [ON Semiconductor], CAT5241YI-10 Datasheet

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CAT5241YI-10

Manufacturer Part Number
CAT5241YI-10
Description
Manufacturer
ONSEMI [ON Semiconductor]
Datasheet
1.CAT5241YI-10.pdf (16 pages)
Quad Digitally Programmable Potentiometer (DPP™) with
64 Taps and I²C Interface
FEATURES
PIN CONFIGURATION
© 2008 SCILLC. All rights reserved.
Characteristics subject to change without notice
For Ordering Information details, see page 15.
Four linear-taper digitally programmable
potentiometers
64 resistor taps per potentiometer
End to end resistance 2.5kΩ, 10kΩ, 50kΩ or
100kΩ
Potentiometer control and memory access via
I²C interface
Low wiper resistance, typically 80Ω
Nonvolatile memory storage for up to four
wiper settings for each potentiometer
Automatic recall of saved wiper settings at
power up
2.5 to 6.0 volt operation
Standby current less than 1µA
1,000,000 nonvolatile WRITE cycles
100 year nonvolatile memory data retention
20-lead SOIC and TSSOP packages
Industrial temperature range
TSSOP 20 Lead (Y)
GND 10
SOIC 20 Lead (W)
SDA
R
R
R
R
R
R
A0
A2
W0
W1
H0
H1
L0
L1
1
2
3
4
5
6
7
8
9
5241
CAT
20 V
19 R
18 R
17 R
16 A1
15 A3
14 SCL
13 R
12 R
11 R
CC
W3
L3
H3
W2
L2
H2
SDA
SCL
A0
A1
A2
A3
INTERFACE
CONTROL
I
2
LOGIC
C BUS
1
DESCRIPTION
The
Potentiometers (DPPs™) integrated with control logic
and 16 bytes of NVRAM memory. Each DPP consists
of a series of 63 resistive elements connected
between two externally accessible end points. The tap
points between each resistive element are connected
to the wiper outputs with CMOS switches. A separate
6-bit control register (WCR) independently controls
the wiper tap switches for each DPP. Associated with
each wiper control register are four 6-bit non-volatile
memory data registers (DR) used for storing up to four
wiper settings. Writing to the wiper control register or
any of the non-volatile data registers is via a I²C serial
bus. On power-up, the contents of the first data
register (DR0) for each of the four potentiometers is
automatically loaded into its respective wiper control
register (WCR).
The CAT5241 can be used as a potentiometer or as a
two terminal, variable resistor. It is intended for circuit
level or system level adjustments in a wide variety of
applications.
FUNCTIONAL DIAGRAM
CAT5241
NONVOLATILE
REGISTERS
REGISTERS
CONTROL
WIPER
DATA
is
four
R
R
H0
L0
Digitally
R
R
H1
L1
CAT5241
R
R
Doc. No. MD-2011 Rev. Q
Programmable
H2
L2
R
R
H3
L3
R
R
R
R
W0
W1
W2
W3

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CAT5241YI-10 Summary of contents

Page 1

Quad Digitally Programmable Potentiometer (DPP™) with 64 Taps and I²C Interface FEATURES Four linear-taper digitally programmable potentiometers 64 resistor taps per potentiometer End to end resistance 2.5kΩ, 10kΩ, 50kΩ or 100kΩ Potentiometer control and memory access via I²C interface Low ...

Page 2

CAT5241 PIN DESCRIPTION Pin (SOIC) Name Function 1 R Wiper Terminal for Potentiometer Low Reference Terminal for Potentiometer High Reference Terminal for Potentiometer Device Address, LSB 5 A2 ...

Page 3

ABSOLUTE MAXIMUM RATINGS Parameter Temperature Under Bias Storage Temperature Voltage on any Pin with Respect with Respect to Ground CC Package Power Dissipation Capability (T Lead Soldering Temperature (10s) Wiper Current Recommended Operating Conditions V = +2.5V ...

Page 4

CAT5241 D.C. OPERATING CHARACTERISTICS Over recommended operating conditions unless otherwise stated. Symbol Parameter I Power Supply Current CC I Standby Current (V = 5.0V Input Leakage Current LI I Output Leakage Current LO V Input Low Voltage ...

Page 5

WRITE CYCLE LIMITS Over recommended operating conditions unless otherwise stated. Symbol Parameter t Write Cycle Time WR The write cycle is the time from a valid stop condition of a write sequence to the end of the internal program/erase cycle. ...

Page 6

CAT5241 SERIAL BUS PROTOCOL The following defines the features of the I²C bus protocol: (1) Data transfer may be initiated only when the bus is not busy. (2) During a data transfer, the data line must remain stable whenever the ...

Page 7

WRITE OPERATION In the Write mode, the Master device sends the START condition and the slave address information to the Slave device. After the Slave generates an acknowledge, the Master sends the instruction byte that defines the requested operation of ...

Page 8

CAT5241 INSTRUCTIONS AND REGISTER DESCRIPTION SLAVE ADDRESS BYTE The first byte sent to the CAT5241 from the master/processor is called the Slave/DPP Address Byte. The most significant four bits of the slave address are a device type identifier. These bits ...

Page 9

WIPER CONTROL AND DATA REGISTERS Wiper Control Register (WCR) The CAT5241 contains four 6-bit Wiper Control Registers, one for each potentiometer. The Wiper Control Register output is decoded to select one of 64 switches along its resistor array. The contents ...

Page 10

CAT5241 exchange data between the WCR and one of the Data Registers. The WCR controls the position of the wiper. The response of the wiper to this action will be delayed transfer from the WCR (current ...

Page 11

Figure 10. Increment/Decrement INC/DEC Command Issued SCL SDA R W INSTRUCTION FORMAT Read Wiper Control Register (WCR) DEVICE ADDRESSES Write Wiper Control Register (WCR) S DEVICE ADDRESSES ...

Page 12

CAT5241 Global Transfer Data Register (DR) to Wiper Control Register (WCR) DEVICE ADDRESSES Global Transfer Wiper Control Register (WCR) to Data Register (DR) DEVICE ADDRESSES S T ...

Page 13

PACKAGE OUTLINE DRAWINGS (1)(2) SOIC 20-Lead 300 mils (W) b PIN#1 IDENTIFICATION TOP VIEW D A SIDE VIEW For current Tape and Reel information, download the PDF file from: http://www.catsemi.com/documents/tapeandreel.pdf. Notes: (1) All dimensions are in millimeters. Angles in degree. ...

Page 14

CAT5241 (1)(2) TSSOP 20-Lead 4.4mm ( TOP VIEW D A2 SIDE VIEW For current Tape and Reel information, download the PDF file from: http://www.catsemi.com/documents/tapeandreel.pdf. Notes: (1) All dimensions are in millimeters. Angles in degree. (2) Complies with JEDEC ...

Page 15

... CAT5241WI-10 10kΩ CAT5241WI-50 50kΩ CAT5241WI-00 100kΩ CAT5241YI-25 2.5kΩ CAT5241YI-10 10kΩ CAT5241YI-50 50kΩ CAT5241YI-00 100kΩ Notes: (1) All packages are RoHS-compliant (Lead-free, Halogen-free). (2) The standard lead finish is Matte-Tin. (3) This device used in the above example is a CAT5241WI-10-T1 (SOIC, Industrial Temperature, 10kΩ, Tape & Reel, 1,000/Reel). ...

Page 16

CAT5241 REVISION HISTORY Date Revision Description 30-Sep-03 G Deleted WP from Functional Diagram, pg. 1 03-Mar-04 H Added TSSOP package in all areas Eliminated data sheet designation 29-Mar-04 I Eliminated Commercial temperature range in all areas Updated Absolute Max Ratings ...

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