MC74HC373ADW ONSEMI [ON Semiconductor], MC74HC373ADW Datasheet
MC74HC373ADW
Manufacturer Part Number
MC74HC373ADW
Description
Octal 3-State Non-Inverting Transparent Latch
Manufacturer
ONSEMI [ON Semiconductor]
Datasheet
1.MC74HC373ADW.pdf
(8 pages)
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MC74HC373A
Octal 3-State Non-Inverting
Transparent Latch
High–Performance Silicon–Gate CMOS
inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LSTTL outputs.
asynchronously) when Latch Enable is high. When Latch Enable goes
low, data meeting the setup and hold time becomes latched.
when Output Enable is high, all device outputs are forced to the
high–impedance state. Thus, data may be latched even when the
outputs are not enabled.
data inputs on the opposite side of the package from the outputs to
facilitate PC board layout.
March, 2000 – Rev. 8
The MC74HC373A is identical in pinout to the LS373. The device
These latches appear transparent to data (i.e., the outputs change
The Output Enable input does not affect the state of the latches, but
The HC373A is identical in function to the HC573A which has the
The HC373A is the non–inverting version of the HC533A.
No. 7A
Output Drive Capability: 15 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1.0 A
High Noise Immunity Characteristic of CMOS Devices
In Compliance with the Requirements Defined by JEDEC Standard
Chip Complexity: 186 FETs or 46.5 Equivalent Gates
Semiconductor Components Industries, LLC, 2000
1
20
MC74HC373AN
MC74HC373ADW
MC74HC373ADWR2
MC74HC373ADT
MC74HC373ADTR2
20
20
1
1
Device
1
ORDERING INFORMATION
A
WL = Wafer Lot
YY = Year
WW = Work Week
SOIC WIDE–20
http://onsemi.com
DW SUFFIX
CASE 751D
= Assembly Location
CASE 948G
DT SUFFIX
TSSOP–20
CASE 738
N SUFFIX
PDIP–20
SOIC–WIDE
SOIC–WIDE
TSSOP–20
TSSOP–20
Publication Order Number:
Package
PDIP–20
20
20
1
1
MC74HC373A/D
MC74HC373AN
DIAGRAMS
MARKING
AWLYYWW
AWLYYWW
20
1
HC373A
1000 / Reel
2500 / Reel
1440 / Box
Shipping
38 / Rail
75 / Rail
ALYW
373A
HC
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MC74HC373ADW Summary of contents
Page 1
... TSSOP– SUFFIX 1 CASE 948G A = Assembly Location WL = Wafer Lot YY = Year WW = Work Week ORDERING INFORMATION Device Package MC74HC373AN PDIP–20 MC74HC373ADW SOIC–WIDE MC74HC373ADWR2 SOIC–WIDE MC74HC373ADT TSSOP–20 MC74HC373ADTR2 TSSOP–20 1 Publication Order Number: MARKING DIAGRAMS 20 MC74HC373AN AWLYYWW 1 20 HC373A AWLYYWW ...
Page 2
LOGIC DIAGRAM DATA D3 INPUTS LATCH ENABLE 1 OUTPUT ENABLE Î Î Î Î Î Î Î Î Î Î Î Î Î Î ...
Page 3
MAXIMUM RATINGS* Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î ...
Page 4
DC ELECTRICAL CHARACTERISTICS Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î ...
Page 5
TIMING REQUIREMENTS ( pF, ...
Page 6
TEST POINT OUTPUT DEVICE UNDER TEST *Includes all probe and jig capacitance Figure 5. EXPANDED LOGIC DIAGRAM ...
Page 7
SEATING PLANE 0.25 (0.010 20X T 0. 18X MC74HC373A PACKAGE DIMENSIONS PDIP–20 N SUFFIX PLASTIC DIP PACKAGE CASE 738–03 ...
Page 8
K 20X REF 0.10 (0.004) 0.15 (0.006 L PIN 1 IDENT 1 0.15 (0.006 –V– 0.100 (0.004) –T– SEATING PLANE ON Semiconductor and are trademarks of Semiconductor Components ...