HD74AC HITACHI [Hitachi Semiconductor], HD74AC Datasheet - Page 29

• Manufacturer Part Number: HD74AC
• Description: HD74AC Series Common Information
• Manufacturer: HITACHI [Hitachi Semiconductor]

Definition of Specifications
4. Symbols and Terms Defined for HD74AC Series
Explanation of Symbols Used in Electrical Characteristics and Recommended Operating Conditions
Symbol
V
V
V
V
V
V
V
I
I
I
I
I
I
28
Table 5 DC Characteristics
IN
OZ
CC
OLD
OHD
CCT
IH
IL
OL
OH
t
t
h
+
-
Term
High level input voltage
Low level input voltage
Low level output voltage
High level output voltage
Forward input threshold
voltage
Reverse input threshold
voltage
Hysteresis voltage
Input leakage current
Off-state output current
(high-impedance)
Quiescent Supply current
Minimum Dynamic Output
Current
Maximum I
CC
/Input
Description
High level input voltage to ensure that a logic element operates
under some constraint
Low level input voltage to ensure that a logic element operates
under some constraint
Output voltage in effect when, under the input condition for
bringing the output low, the rated output current is allowed to flow
to the output terminal
Output voltage in effect when, under the input condition for
bringing the output high, the rated output current is allowed to flow
to the output terminal
Input voltage in effect when the operation of a logic element varies
as the input is allowed to go up form a voltage level lower than the
reverse input threshold voltage V
Input voltage in effect when the operation of a logic element varies
as the input is allowed to drop up form a voltage level higher than
the forward input threshold voltage V
Difference between forward input threshold voltage V
threshold voltage V
Input current that flows in when the rated maximum input voltage
is applied to the input terminal
Current that flows to the 3-state output of an element under the
input condition for bringing the output to high-impedance state
Current that flows to the supply therminal (V
input condition
Output current that flows in when, under the condition for bringing
the output low,the output terminal is tied to the rated out voltage
V
Output current that flows out when, under the condition for
bringing the output high, the output terminal is tied to the rated out
voltage V
Current that flows to the supply terminal (V
condition
OLD
.
OHD
.
t
-
t
-
t
+
CC
CC
) under the rated input
) under the rated
t
+
and reverse