PCF8583BS NXP [NXP Semiconductors], PCF8583BS Datasheet - Page 6
PCF8583BS
Manufacturer Part Number
PCF8583BS
Description
Clock and calendar with 240 x 8-bit RAM
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.PCF8583BS.pdf
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NXP Semiconductors
PCF8583
Product data sheet
7.3 Control and status register
The control and status register is defined as the memory location 00h with free access for
reading and writing via the I
contents of the control and status register (see
Fig 5.
MSB
7
013aaa370
Control and status register
6
All information provided in this document is subject to legal disclaimers.
5
Rev. 06 — 6 October 2010
4
2
C-bus. All functions and options are controlled by the
3
2
1
Clock and calendar with 240 x 8-bit RAM
LSB
Figure
0
memory location 00h
reset state: 0000 0000
timer flag:
alarm flag:
alarm enable bit:
logic 0:
logic 1:
mask flag:
logic 0:
logic 1:
function mode:
00
01
10
11
hold last count flag:
logic 0:
logic 1:
stop counting flag:
logic 0:
logic 1:
5).
event-counter mode
50 % duty factor
seconds flag if alarm enable bit
is logic 0
alarm disabled: flags toggle
alarm control register to disabled
(memory locations 08h to 0Fh
are free RAM space)
enable alarm control register
(memory location 08h is the
alarm control register)
read locations 05h to 06h
unmasked
read date and month count
directly
clock mode 32.768 kHz
50 % duty factor
minutes flag if alarm enable bit
is logic 0
clock mode 50 Hz
test modes
count
store and hold last count in
capture latches
count pulses
stop counting, reset divider
PCF8583
© NXP B.V. 2010. All rights reserved.
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