M41T00AUD_12 STMICROELECTRONICS [STMicroelectronics], M41T00AUD_12 Datasheet - Page 15

• Manufacturer Part Number: M41T00AUD_12
• Description: Serial real-time clock (RTC) with audio
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

M41T00AUD
4.4
Figure 11. WRITE mode sequence
4.5
BUS ACTIVITY:
MASTER
SDA LINE
BUS ACTIVITY:
WRITE mode
In this mode the master transmitter transmits to the M41T00AUD slave receiver. Bus
protocol is shown in
(R/W = 0) is placed on the bus and indicates to the addressed device that word address An
will follow and is to be written to the on-chip address pointer. The data word to be written to
the device is strobed in next and the internal address pointer is incremented to the next
location within the device on the reception of an acknowledge clock. The M41T00AUD slave
receiver will send an acknowledge clock to the master transmitter after it has received the
slave address and again after it has received the word address and each data byte (see
Figure
Data retention mode
With valid V
or WRITE cycles. Should the supply voltage decay, the M41T00AUD will automatically
deselect, write protecting itself when V
8).
S
ADDRESS
CC
SLAVE
applied, the M41T00AUD can be accessed as described above with READ
Figure
ADDRESS (An)
11. Following the START condition and slave address, a logic '0'
WORD
Doc ID 13480 Rev 5
CC
falls (see
DATA n
Figure
DATA n+1
13).
DATA n+X
AI00591
Operation
P
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