M41T00AUD_12 STMICROELECTRONICS [STMicroelectronics], M41T00AUD_12 Datasheet - Page 24

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M41T00AUD_12

Manufacturer Part Number
M41T00AUD_12
Description
Serial real-time clock (RTC) with audio
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
Clock calibration
6
6.1
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Clock calibration
The M41T00AUD oscillator is designed for use with a 12.5 pF crystal load capacitance. With
a nominal ±20 ppm crystal, the M41T00AUD will be accurate to ±35 ppm. When the
calibration circuit is properly employed, accuracy improves to better than ±2 ppm at 25 °C.
The M41T00AUD design provides the following method for clock error correction.
Digital calibration (periodic counter correction)
This method employs the use of periodic counter correction by adjusting the number of
cycles of the internal 512 Hz signal counted in a second. By adding an extra cycle, for 513,
a long second is counted for slowing the clock. By reducing it to 511 cycles, a short second
is counted for speeding up the clock.
Not every second is affected. The calibration value (bits D4-D0 of register 07h) and its sign
bit (D5 of same register) control how often a short or long second is generated.
The basic nature of a 32 KHz crystal is to slow down at temperatures above and below
25 °C. Whether the temperature is above or below 25 °C, the device will tend to run slow.
Therefore, most corrections will need to speed the clock up. Hence, the M41T00AUD
calibration circuit uses a non-symmetric calibration scheme. Positive values, for speeding
the clock up, have more effect than negative values, for slowing it down. A positive value will
speed the clock up by approximately 4 ppm per step. A negative value will slow it by
approximately 2 ppm per step.
In the M41T00AUD's calibration circuit, positive correction is applied every 8
whereas negative correction is applied every 16
applied twice as often, it has twice the effect for a given calibration number, N. When the
calibration sign bit is positive, N seconds of every 8
of the 512 Hz clock. When the calibration sign bit is negative, N seconds of every 16
minute will be lengthened to 513 cycles of the 512 Hz clock.
When N is positive, one minute will have N seconds which are 511 cycles and the remaining
seconds will be 512 cycles. The next seven minutes are nominal with all seconds 512
cycles each.
Example 1:
Sign is 1 and N is 2 (00010b)
The 8-minute interval will be:
2 * 511 + (60-2) * 512 + 7 * 60 * 512 = 245758 cycles long out of a possible
512 * 60 * 8 = 245760 cycles of the 512 Hz clock in an 8-minute span.
This gives a net correction of (245760-245758) / 245760 = -8.138 ppm
When N is negative, one minute will have N seconds which are 513 cycles and the
remaining seconds will be 512 cycles. The next 15 minutes are nominal with all seconds
512 cycles each.
Doc ID 13480 Rev 5
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minute. Because positive correction is
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minute will be shortened to 511 cycles
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minute
M41T00AUD
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