AD5755-1_11 AD [Analog Devices], AD5755-1_11 Datasheet - Page 11

no-image

AD5755-1_11

Manufacturer Part Number
AD5755-1_11
Description
Quad Channel, 16-Bit,Serial Input, 4 mA to 20 mA and Voltage Output DAC,Dynamic Power Control
Manufacturer
AD [Analog Devices]
Datasheet
ABSOLUTE MAXIMUM RATINGS
T
100 mA do not cause SCR latch-up.
Table 4.
Parameter
AV
AV
AV
AV
DV
Digital Inputs to DGND
Digital Outputs to DGND
REFIN, REFOUT to AGND
V
+V
I
SW
AGND, GNDSW
Operating Temperature Range (T
Storage Temperature Range
Junction Temperature (T
64-Lead LFCSP
Power Dissipation
Lead Temperature
1
2
OUT_x
Power dissipated on chip must be derated to keep the junction temperature
below 125°C.
Based on a JEDEC 4-layer test board.
OUT_x
A
Industrial
DD
SS
DD
CC
SENSE_x
θ
Soldering
DD
x
= 25°C, unless otherwise noted. Transient currents of up to
JA
to AGND
, V
to AGND, DGND
to AGND
to AGND
to AV
to DGND
to AGND
Thermal Impedance
BOOST_x
to AGND
SS
1
to AGND, DGND
x
to DGND
J
max)
2
A
)
Rating
−0.3 V to +33 V
+0.3 V to −28 V
−0.3 V to +60 V
−0.3 V to +7 V
−0.3 V to +7 V
−0.3 V to DV
−0.3 V to DV
(whichever is less)
−0.3 V to AV
(whichever is less)
AV
the dc-to-dc circuitry
AV
the dc-to-dc circuitry
AV
the dc-to-dc circuitry
−0.3 to +33 V
−0.3 V to +0.3 V
−40°C to +105°C
−65°C to +150°C
125°C
20°C/W
(T
JEDEC industry standard
J-STD-020
J
(whichever is less)
max − T
SS
SS
SS
to V
to V
to V
BOOST_x
BOOST_x
BOOST_x
A
)/θ
DD
DD
DD
JA
+ 0.3 V or +7 V
or 33 V if using
or 33 V if using
or 33 V if using
+ 0.3 V or +7 V
+ 0.3 V or +7 V
Rev. A | Page 11 of 48
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
AD5755-1

Related parts for AD5755-1_11