AD5755-1_11 AD [Analog Devices], AD5755-1_11 Datasheet - Page 28

• Manufacturer Part Number: AD5755-1_11
• Description: Quad Channel, 16-Bit,Serial Input, 4 mA to 20 mA and Voltage Output DAC,Dynamic Power Control
• Manufacturer: AD [Analog Devices]

AD5755-1
THEORY OF OPERATION
The AD5755-1 is a quad, precision digital-to-current loop and
voltage output converter designed to meet the requirements of
industrial process control applications. It provides a high precision,
fully integrated, low cost, single-chip solution for generating
current loop and unipolar/bipolar voltage outputs. The current
ranges available are 0 mA to 20 mA, 0 mA to 24 mA, and 4 mA
to 20 mA. The voltage ranges available are 0 V to 5 V, ±5 V, 0 V
to 10 V, and ±10 V. The current and voltage outputs are availa-
ble on separate pins, and only one is active at any one time. The
desired output configuration is user selectable via the DAC
control register.
On-chip dynamic power control minimizes package power
dissipation in current mode.
DAC ARCHITECTURE
The DAC core architecture of the AD5755-1 consists of two
matched DAC sections. A simplified circuit diagram is shown
in Figure 71. The four MSBs of the 16-bit data-word are
decoded to drive 15 switches, E1 to E15. Each of these switches
connects one of 15 matched resistors to either ground or the
reference buffer output. The remaining 12 bits of the data-word
drive Switch S0 to Switch S11 of a 12-bit voltage mode R-2R
ladder network.
The voltage output from the DAC core is either converted to a
current (see Figure 73), which is then mirrored to the supply rail
so that the application simply sees a current source output, or it
is buffered and scaled to output a software selectable unipolar or
bipolar voltage range (see Figure 72). Both the voltage and current
outputs are supplied by V
output on separate pins and cannot be output simultaneously.
A channel’s current and voltage output pins can be tied together.
DAC
2R
8-/12-BIT R-2R LADDER
S0
2R
SCALING
RANGE
Figure 71. DAC Ladder Structure
S1
2R
Figure 72. Voltage Output
BOOST_x
2R
S11
FOUR MSBs DECODED INTO
. The current and voltage are
V
15 EQUAL SEGMENTS
OUT_X
2R
E1
SHORT FAULT
E2
2R
2R
+V
V
E15
OUT_x
SENSE_x
V
OUT
Rev. A | Page 28 of 48
Voltage Output Amplifier
The voltage output amplifier is capable of generating both
unipolar and bipolar output voltages. It is capable of driving a
load of 1 kΩ in parallel with 1 μF (with an external compen-
sation capacitor) to AGND. The source and sink capabilities of
the output amplifier are shown in Figure 23. The slew rate is
1.9 V/μs with a full-scale settling time of 16 μs (10 V step). If
remote sensing of the load is not required, connect +V
directly to V
for correct operation.
Driving Large Capacitive Loads
The voltage output amplifier is capable of driving capacitive
loads of up to 2 μF with the addition of a 220 pF nonpolarized
compensation capacitor on each channel. Care should be taken
to choose an appropriate value of compensation capacitor. This
capacitor, while allowing the AD5755-1 to drive higher capaci-
tive loads and reduce overshoot, increases the settling time of
the part and, therefore, affects the bandwidth of the system.
Without the compensation capacitor, up to 10 nF capacitive
loads can be driven. See Table 5 for information on connecting
compensation capacitors.
Reference Buffers
The AD5755-1 can operate with either an external or internal
reference. The reference input requires a 5 V reference for
specified performance. This input voltage is then buffered
before it is applied to the DAC.
POWER-ON STATE OF THE AD5755-1
On initial power-up of the AD5755-1, the power-on reset
circuit powers up in a state that is dependent on the power-on
condition (POC) pin.
If POC = 0, the voltage output and current output channels
power up in tristate mode.
If POC = 1, the voltage output channel powers up with a 30 kΩ
pull-down resistor to ground, and the current output channel
powers up to tristate.
Even though the output ranges are not enabled, the default
output range is 0 V to 5 V, and the clear code register is loaded
16-BIT
Figure 73. Voltage-to-Current Conversion Circuitry
DAC
OUT_x
. + V
SENSE_x
A1
must stay within ±3.0 V of V
T1
R2
R
SET
A2
T2
V
BOOST_x
R3
I
OUT_x
SENSE_x
OUT_x