AD5755-1_11 AD [Analog Devices], AD5755-1_11 Datasheet - Page 46

• Manufacturer Part Number: AD5755-1_11
• Description: Quad Channel, 16-Bit,Serial Input, 4 mA to 20 mA and Voltage Output DAC,Dynamic Power Control
• Manufacturer: AD [Analog Devices]

AD5755-1
DRIVING INDUCTIVE LOADS
When driving inductive or poorly defined loads, a capacitor
may be required between I
A 0.01 μF capacitor between I
of a load of 50 mH. The capacitive component of the load may
cause slower settling, although this may be masked by the set-
tling time of the AD5755-1. There is no maximum capacitance
limit for the current output of the AD5755-1.
TRANSIENT VOLTAGE PROTECTION
The AD5755-1 contains ESD protection diodes that prevent dam-
age from normal handling. The industrial control environment
can, however, subject I/O circuits to much higher transients. To
protect the AD5755-1 from excessively high voltage transients,
external power diodes and a surge current limiting resistor are
required, as shown in Figure 86. The two protection diodes and
resistor must have appropriate power ratings. Further protection
can be provided with transient voltage suppressors or transorbs;
these are available as both unidirectional suppressors (protect
against positive high voltage transients) and bidirectional
suppressors (protect against both positive and negative high
voltage transients) and are available in a wide range of standoff
and breakdown voltage ratings. It is recommended that all field
connected nodes be protected.
MICROPROCESSOR INTERFACING
Microprocessor interfacing to the AD5755-1 is via a serial bus
that uses a protocol compatible with microcontrollers and DSP
processors. The communications channel is a 3-wire minimum
interface consisting of a clock signal, a data signal, and a latch
signal. The AD5755-1 requires a 24-bit data-word with data
valid on the falling edge of SCLK.
The DAC output update is initiated on either the rising edge of
LDAC or, if LDAC is held low, on the rising edge of SYNC . The
contents of the registers can be read using the readback function.
AD5755-1-TO-ADSP-BF527 INTERFACE
The AD5755-1 can be connected directly to the SPORT
interface of the ADSP-BF527, an Analog Devices, Inc.,
Blackfin® DSP. Figure 87 shows how the SPORT interface
can be connected to control the AD5755-1.
Figure 86. Output Transient Voltage Protection
AD5755-1
V
BOOST_x
AV
GND
I
OUT_x
DD
OUT_x
OUT_x
and AGND to ensure stability.
R
P
and AGND ensures stability
R
LOAD
Rev. A | Page 46 of 48
LAYOUT GUIDELINES
Grounding
In any circuit where accuracy is important, careful consideration
of the power supply and ground return layout helps to ensure
the rated performance. The printed circuit board on which the
AD5755-1 is mounted should be designed so that the analog
and digital sections are separated and confined to certain areas of
the board. If the AD5755-1 is in a system where multiple devices
require an AGND-to-DGND connection, the connection should
be made at one point only. The star ground point should be
established as close as possible to the device.
The GNDSW
referred to as PGND. PGND should be confined to certain areas
of the board, and the PGND-to-AGND connection should be
made at one point only.
Supply Decoupling
The AD5755-1 should have ample supply bypassing of 10 μF
in parallel with 0.1 μF on each supply located as close to the
package as possible, ideally right up against the device. The
10 μF capacitors are the tantalum bead type. The 0.1 μF
capacitor should have low effective series resistance (ESR) and
low effective series inductance (ESL), such as the common
ceramic types, which provide a low impedance path to ground
at high frequencies to handle transient currents due to internal
logic switching.
Traces
The power supply lines of the AD5755-1 should use as large a
trace as possible to provide low impedance paths and reduce
the effects of glitches on the power supply line. Fast switching
signals such as clocks should be shielded with digital ground
to prevent radiating noise to other parts of the board and
should never be run near the reference inputs. A ground line
routed between the SDIN and SCLK lines helps reduce crosstalk
between them (not required on a multilayer board that has a
separate ground plane, but separating the lines helps). It is
essential to minimize noise on the REFIN line because it
couples through to the DAC output.
Avoid crossover of digital and analog signals. Traces on oppo-
site sides of the board should run at right angles to each other.
This reduces the effects of feedthrough on the board. A
microstrip technique is by far the best but not always possible
with a double-sided board. In this technique, the component
ADSP-BF527
Figure 87. AD5755-1-to-ADSP-BF527 SPORT Interface
x
SPORT_TSCK
and ground connection for the AV
SPORT_DTO
SPORT_TFS
GPIO0
SYNC
SCLK
SDIN
LDAC
AD5755-1
CC
supply are