ADV7170SU AD [Analog Devices], ADV7170SU Datasheet - Page 31

• Manufacturer Part Number: ADV7170SU
• Manufacturer: AD [Analog Devices]

The circuit below can be used to generate a 13.5 MHz waveform using the 27 MHz clock and the HSYNC pulse. This waveform
is guaranteed to produce the 13.5 MHz clock in synchronization with the 27 MHz clock. This 13.5 MHz clock can be used if
13.5 MHz clock is required by the MPEG decoder. This will guarantee that the Cr and Cb pixel information is input to the
ADV7170/ADV7171 in the correct sequence.
REV. 0
RESET
TELETEXT PULL-UP AND
PULL-DOWN RESISTORS
SHOULD ONLY BE USED
IF THESE PINS ARE NOT
CONNECTED
TTX
TTXREQ
+5V (V
+5V (V
(SAME CLOCK AS USED BY
4k
100k
100k
AA
100nF
AA
)
)
MPEG2 DECODER)
27MHz CLOCK
“UNUSED
INPUTS
SHOULD BE
GROUNDED”
HSYNC
CLOCK
+5V (V
AA
0.1 F
)
+5V (V
+5V (V
2–9, 12–14
Figure 54. Recommended Analog Circuit Layout
10k
38–42,
AA
0.1 F
AA
)
)
D
Figure 55. Circuit to Generate 13.5 MHz
CK
35 SCRESET/RTC
15
16
17
37 TTX
36 TTXREQ
44
25
33
22
P15–P0
V
BLANK
RESET
CLOCK
COMP
HSYNC
FIELD/VSYNC
REF
Q
ALSB
18
ADV7170/
ADV7171
V
POWER SUPPLY DECOUPLING
FOR EACH POWER SUPPLY GROUP
AA
1, 11, 20, 28, 30
GND
–31–
10, 19, 21
29, 43
SCLOCK
DAC D
DAC A
SDATA
DAC C
DAC B
R
SET
0.1 F
27
26
31
32
23
24
34
0.01 F
150
75
75
75
75
100
100
D
CK
+5V (V
Q
+5V (V
AA
10 F
)
5k
CC
)
ADV7170/ADV7171
(FERRITE BEAD)
13.5MHz
+5V (V
S VIDEO
L1
5k
CC
)
MPU BUS
33 F
+5V
(V
GND
CC
)