PCA9691BS NXP [NXP Semiconductors], PCA9691BS Datasheet - Page 7
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PCA9691BS
Manufacturer Part Number
PCA9691BS
Description
8-bit A/D and D/A converter
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.PCA9691BS.pdf
(31 pages)
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NXP Semiconductors
PCA9691_2
Product data sheet
The selection of a non-existing input channel results in the highest available channel
number being allocated. Therefore, if the auto-increment flag is set, the next selected
channel is always channel 0.
After power-on all bits of the control register are reset to logic 0. The DAC and the
oscillator are disabled for power saving. The analog output is switched to a
high-impedance state.
The most significant bits of both nibbles are reserved for oscillator control. Bit 7 and bit 3
can be set when the interface frequency is f
two bits to logic 1 sets the internal frequency to half and the accuracy of the A/D and D/A
conversion is 1 LSB as indicated in
The oscillator output is disabled in normal operation (pin OSC is LOW). Setting bit 7 to
logic 0 and bit 3 to logic 1 will enable this output in order to observe the oscillator
frequency (divided by 4).
Rev. 02 — 27 January 2010
Table 8
SCL
and
≤ 400 kHz (see
Table
9.
8-bit A/D and D/A converter
Figure
PCA9691
6). Setting these
© NXP B.V. 2010. All rights reserved.
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