DAC1408D650HN NXP [NXP Semiconductors], DAC1408D650HN Datasheet - Page 16
DAC1408D650HN
Manufacturer Part Number
DAC1408D650HN
Description
Dual 14-bit DAC; up to 650 Msps; 2?, 4? or 8? interpolating with JESD204A interface
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.DAC1408D650HN.pdf
(98 pages)
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NXP Semiconductors
DAC1408D650
Product data sheet
Each DAC device of the system generates its own reference (ref_A in
If configured as a slave, an early-late comparator compares the internal reference with the
external reference provided by the MDS pins. The comparator controls an internal buffer
that is used to delay the samples.
Fig 7.
Multi-Device Synchronization (MDS) implementation
All information provided in this document is subject to legal disclaimers.
SYNC~
LANES
Rev. 4 — 26 November 2010
DIG
ref_A
2, 4 or 8 interpolating DAC with JESD204A
BUFFER
COMP
MGMT
CLK
CK
mds_A_out
mds_A
Q
I
DAC
DAC1408D650
001aal073
MDS_A
Figure
© NXP B.V. 2010. All rights reserved.
7).
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