DSP56156FV40 MOTOROLA [Motorola, Inc], DSP56156FV40 Datasheet - Page 28

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DSP56156FV40

Manufacturer Part Number
DSP56156FV40
Description
16-bit Digital Signal Processor
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
28
AC Electrical Characteristics and Timing
Reset, Stop, Wait, Mode Select, and Interrupt Timing
Capacitance Derating
Capacitance Derating
The DSP56156 External Bus Timing Specifications are designed and tested at the maximum ca-
pacitive load of 50 pF, including stray capacitance. Typically, the drive capability of the Exter-
nal Bus pins (A0-A15, D0-D15, PS/DS, RD, BS, WR, R/W) derates linearly at 1 ns per 12 pF of
additional capacitance from 50 pF to 250 pF of loading. Port B and C pins derate linearly at 1 ns
per 5 pF of additional capacitance from 50 pF to 250 pF of loading.
When an internal memory access follows an external memory access, the PS/DS, R/W, RD
and WR strobes remain deasserted and A0-A15 do not change from their previous state.
Figure 16 Recovery from Wait/Stop State Using DR Pin — Asynchronous Timing
(output)
(output)
(input)
CLKO
DSO
DR
Freescale Semiconductor, Inc.
For More Information On This Product,
DSP56156 Data Sheet
T0, T2
30
Go to: www.freescale.com
T1, T3
33
31
MOTOROLA

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