ADSP-BF522 AD [Analog Devices], ADSP-BF522 Datasheet - Page 33

• Manufacturer Part Number: ADSP-BF522
• Description: Blackfin Embedded Processor
• Manufacturer: AD [Analog Devices]

Preliminary Technical Data
Table 20. Electrical Characteristics For ADSP-BF523/525/527 Processors (Continued)
1
2
3
4
5
Total Power Dissipation
Total power dissipation has two components:
Many operating conditions can also affect power dissipation,
including temperature, voltage, operating frequency, and pro-
cessor activity.
current dissipation for internal circuitry (V
specifies static power dissipation as a function of voltage
(V
specifies the total power specification for the listed test condi-
tions, including the dynamic component as a function of voltage
(V
There are two parts to the dynamic component. The first part is
due to transistor switching in the core clock (CCLK) domain.
This part is subject to an Activity Scaling Factor (ASF) which
represents application code running on the processor core and
L1/L2 memories
Parameter
I
I
I
I
I
I
I
See the ADSP-BF522/523/524/525/526/527 Blackfin Processor Hardware Reference Manual for definition of sleep, deep sleep, and hibernate operating modes.
Includes current on V
Guaranteed maximum specifications.
Unit for V
See
DDHIBERNATE
DDRTC
DDUSB-FS
DDUSB-HS
DDSLEEP
DDDEEPSLEEP
DDINT
1. Static, including leakage current
2. Dynamic, due to transistor switching characteristics
DDINT
DDINT
Table 21
3, 5
1, 3
) and temperature (see
) and frequency
DDINT
1, 2
1, 3
for the list of I
is V (Volts). Unit for f
Hibernate State Current
V
V
Speed Mode
V
Mode
V
V
Mode
V
Electrical Characteristics on Page 31
DDRTC
DDUSB
DDUSB
DDINIT
DDINT
DDINT
(Table
DDEXT
Current in Deep Sleep
Current
Current
Current in Full/Low
Current in High Speed
Current in Sleep Mode f
, V
DDINT
(Table 24
21).
DDUSB
power vectors covered.
, V
Table 22
DDMEM
SCLK
or
is MHz. Example: TBD V, TBD MHz would be TBD
, V
Table
DDOTP
or
, and V
Table
25).
DDINT
Test Conditions
V
V
T
with voltage regulator off
(V
V
V
Full Speed USB Transmit
V
High Speed USB Transmit
f
f
CCLK
CCLK
CCLK
J
DDEXT
DDOTP
DDRTC
DDUSB
DDUSB
V
= 25°C, CLKIN = 0 MHz
DDINT
DDUSB
PPOTP
). I
23), and I
= 0 MHz, f
= 0 MHz, f
Rev. PrG | Page 33 of 80 | February 2009
=V
=V
DDDEEPSLEEP
= 3.3 V, T
= 3.3 V, T
= 3.3 V, T
0 MHz, f
= 0 V)
shows the
supplies. Clock inputs are tied high or low.
= 3.30 V,
DDMEM
PPOTP
=2.5 V,
DDINT
=V
SCLK
SCLK
SCLK
J
J
J
= 25 C
= 25 C,
= 25 C,
DDRTC
= 0 MHz
0 MHz
0 MHz
=
The ASF is combined with the CCLK Frequency and V
dependent data in
The second part is due to transistor switching in the system
clock (SCLK) domain, which is included in the I
tion equation.
Table 21. Activity Scaling Factors (ASF)
1
I
I
I
I
I
I
I
See Estimating Power for ASDP-BF534/BF536/BF537 Blackfin Processors
DD-PEAK
DD-HIGH
DD-TYP
DD-APP
DD-NOP
DD-IDLE
DDINT
(EE-297). The power vector information also applies to the ADSP-BF52x
processors.
x
TBD
Power Vector
ADSP-BF522/523/524/525/526/527
Min
x
TBD = TBD mA adder.
Table 24
Typical
40
20
25
or
9
Table 25
Activity Scaling Factor (ASF)
1.29
1.26
1.00
0.88
0.72
0.44
(Table 25
to calculate this part.
(0.43 V
(0.43 V
1
Table 23
Table 23
Table 23
f
Max
f
SCLK
SCLK
DDINT
)
DDINT
DDINT
)
4
ASF) +
+
+
specifica-
DDINT
Unit
mA
mA
mA
mA
mA
A
A
4