ADSP-BF522 AD [Analog Devices], ADSP-BF522 Datasheet - Page 67

• Manufacturer Part Number: ADSP-BF522
• Description: Blackfin Embedded Processor
• Manufacturer: AD [Analog Devices]

Preliminary Technical Data
TEST CONDITIONS
All timing parameters appearing in this data sheet were mea-
sured under the conditions described in this section.
shows the measurement point for AC measurements (except
output enable/disable). The measurement point V
V
V/3.3 V.
Output Enable Time Measurement
Output balls are considered to be enabled when they have made
a transition from a high impedance state to the point when they
start driving.
The output enable time t
a reference signal reaches a high or low voltage level to the point
when the output starts driving as shown on the right side of
Figure
The time t
signal switches, to when the output voltage reaches V
or V
(high) is 1.05V, and V
(nominal) = 2.5V, V
For V
V
put starts driving to when the output reaches the V
V
Time t
If multiple balls (such as the data bus) are enabled, the measure-
ment value is that of the first ball to start driving.
DDEXT
TRIP
TRIP
(MEASURED)
(MEASURED)
t
TRIP
DIS
(low) trip voltage.
V
V
(low) is 1.4V. Time t
DDEXT
OUTPUT
ENA
OH
OL
/2 or V
INPUT
58.
OUTPUT STOPS DRIVING
(low). For V
OR
ENA_MEASURED
is calculated as shown in the equation:
/V
Measurements (Except Output Enable/Disable)
DDMEM
DDMEM
Figure 57. Voltage Reference Levels for AC
V
MEAS
t
ENA
Figure 58. Output Enable/Disable
REFERENCE
t
V
V
DIS_MEASURED
OH
/2 for V
OL
(nominal) = 3.3V, V
DDEXT
SIGNAL
TRIP
t
=
(MEASURED)
TRIP
DECAY
(MEASURED) + V
is the interval, from when the reference
(high) is 1.5V and V
t
ENA
/V
ENA_MEASURED
(low) is 0.75V. For V
TRIP
DDEXT
HIGH IMPEDANCE STATE
DDMEM
is the interval from the point when
is the interval from when the out-
t
/V
ENA
(nominal) = 1.8V, V
DDMEM
V
OUTPUT STARTS DRIVING
TRIP
–
(nominal) = 1.8 V/2.5
t
TRIP
(high) is 1.9V, and
TRIP
t
ENA_MEASURED
V
V
TRIP
DDEXT
TRIP
t
TRIP
(low) is 1.0V.
Rev. PrG | Page 67 of 80 | February 2009
(LOW)
MEAS
V
(HIGH)
V
TRIP
OH
OL
/V
Figure 57
(MEASURED)
V
(MEASURED)
TRIP
MEAS
(high) or
is
DDMEM
TRIP
(high)
Output Disable Time Measurement
Output balls are considered to be disabled when they stop driv-
ing, go into a high impedance state, and start to decay from their
output high or low voltage. The output disable time t
difference between t
side of
The time for the voltage on the bus to decay by V is dependent
on the capacitive load C
time can be approximated by the equation:
The time t
and 0.15 V for V
The time t
signal switches, to when the output voltage decays V from the
measured output high or output low voltage.
Example System Hold Time Calculation
To determine the data output hold time in a particular system,
first calculate t
to be the difference between the processor’s output voltage and
the input threshold for the device requiring the hold time. C
the total bus capacitance (per data line), and I
age or three-state current (per data line). The hold time will be
t
Timing Specifications on Page 38
SDRAM write cycle as shown in
Page
DECAY
V equal to 0.25 V for V
44).
ADSP-BF522/523/524/525/526/527
plus the various output disable times as specified in the
Figure
DECAY
DIS_MEASURED
t
58.
DIS
DECAY
is calculated with test loads C
DDEXT
=
DIS_MEASURED
t
using the equation given above. Choose V
DECAY
t
/V
DIS_MEASURED
is the interval from when the reference
L
DDMEM
DDEXT
and the load current I
=
/V
(nominal) = 1.8V.
and t
DDMEM
SDRAM Interface Timing on
C
(for example t
L
–
DECAY
V
t
(nominal) = 2.5 V/3.3 V
DECAY
I
L
as shown on the left
L
L
and I
is the total leak-
L
. This decay
DSDAT
L
DIS
, and with
for an
is the
L
is