ADSP-BF606 AD [Analog Devices], ADSP-BF606 Datasheet - Page 24

• Manufacturer Part Number: ADSP-BF606
• Description: Blackfin Dual Core
• Manufacturer: AD [Analog Devices]

ADSP-BF606/ADSP-BF607/ADSP-BF608/ADSP-BF609
PIN TERMINATION AND DRIVE CHARACTERISTICS-REQUIREMENTS
Table 8
minated and driven. In addition, external termination
requirements are provided. In this table the following columns
are used.
Table 8. ADSP-BF60x Pad Table
Signal Name
DMC0_A00
DMC0_A01
DMC0_A02
DMC0_A03
DMC0_A04
DMC0_A05
DMC0_A06
DMC0_A07
DMC0_A08
DMC0_A09
DMC0_A10
DMC0_A11
DMC0_A12
DMC0_A13
DMC0_BA0
DMC0_BA1
DMC0_BA2
DMC0_CAS
DMC0_CK
DMC0_CK
DMC0_CKE
DMC0_CS0
DMC0_DQ00
DMC0_DQ01
DMC0_DQ02
DMC0_DQ03
DMC0_DQ04
DMC0_DQ05
DMC0_DQ06
DMC0_DQ07
DMC0_DQ08
DMC0_DQ09
DMC0_DQ10
DMC0_DQ11
• Internal Termination – Specifies the termination present
• Reset Termination – Specifies the termination present
when the processor is not in the reset or hibernate state.
when the processor is in the reset state.
identifies how each signal on the chip is internally ter-
Internal
Termination
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
Reset
Termination
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
Rev. PrD | Page 24 of 44 | March 2012
Reset Drive Hibernate
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
Low
Low
Low
None
None
None
None
None
None
None
None
None
None
None
None
None
Termination
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
• Reset Drive – Specifies the active drive on the signal when
• Hibernate Termination – Specifies the termination present
• Hibernate Drive – Specifies the active drive on the signal
• Notes – Specifies any special requirements or characteris-
the processor is in the reset state.
when the processor is in the hibernate state.
when the processor is in the hibernate state.
tics for the signal. If no special requirements are listed the
signal may be left unconnected if it is not used.
Hibernate
Drive
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
Low
Low
Low
None
None
None
None
None
None
None
None
None
None
None
None
None
Preliminary Technical Data
Notes
No notes
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No notes
No notes
No notes
No notes
For LPDDR leave unconnected.