SAA7103 PHILIPS [NXP Semiconductors], SAA7103 Datasheet - Page 53

• Manufacturer Part Number: SAA7103
• Description: Digital video encoder
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors
Table 86 Subaddress 96H
Table 87 Subaddress 97H
2001 Sep 25
EFS
PCBN
SLAVE
ILC
YFIL
HSL
HFS
VFS
OFS
PFS
OVS
PVS
DATA BYTE
DATA BYTE
Digital video encoder
LOGIC
LEVEL
LOGIC
LEVEL
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
frame sync signal at pin FSVGC ignored in slave mode
frame sync signal at pin FSVGC accepted in slave mode
normal polarity of CBO signal (HIGH during active video)
inverted polarity of CBO signal (LOW during active video)
the SAA7102; SAA7103 is timing master to the graphics controller
the SAA7102; SAA7103 is timing slave to the graphics controller
if hardware cursor insertion is active, set LOW for non-interlaced input signals
if hardware cursor insertion is active, set HIGH for interlaced input signals
luminance sharpness booster disabled
luminance sharpness booster enabled
normal trigger event handling of the horizontal state machine, if the SAA7102;
SAA7103 is slave to HSVGC input
trigger event for horizontal state machine is shifted 128 PIXCLKs in advance, adapted
to a late HSVGC in slave mode
horizontal sync is directly derived from input signal (slave mode) at pin HSVGC
horizontal sync is derived from a frame sync signal (slave mode) at pin FSVGC (only if
EFS is set HIGH)
vertical sync (field sync) is directly derived from input signal (slave mode) at
pin VSVGC
vertical sync (field sync) is derived from a frame sync signal (slave mode) at
pin FSVGC (only if EFS is set HIGH)
pin FSVGC is switched to input
pin FSVGC is switched to active output
polarity of signal on FSVGC in output mode (master mode) is active HIGH; rising edge
of the input signal is used in slave mode
polarity of signal on FSVGC in output mode (master mode) is active LOW; falling edge
of the input signal is used in slave mode
pin VSVGC is switched to input
pin VSVGC is switched to active output
polarity of signal on VSVGC in output mode (master mode) is active HIGH; rising edge
of the input signal is used in slave mode
polarity of signal on VSVGC in output mode (master mode) is active LOW; falling edge
of the input signal is used in slave mode
53
DESCRIPTION
DESCRIPTION
SAA7102; SAA7103
Product specification