CY8C20X37 CYPRESS [Cypress Semiconductor], CY8C20X37 Datasheet - Page 30

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CY8C20X37

Manufacturer Part Number
CY8C20X37
Description
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
Thermal Impedances
Table 31. Thermal Impedances per Package
Capacitance on Crystal Pins
Table 32. Typical Package Capacitance on Crystal Pins
Solder Reflow Peak Temperature
Table 33
Table 33. Solder Reflow Peak Temperature
Document Number: 001-69257 Rev. *F
Notes
33. T
34. To achieve the thermal impedance specified for the QFN package, the center thermal pad must be soldered to the PCB ground plane.
J
= T
A
30-Ball WLCSP
30-ball WLCSP
shows the solder reflow temperature limits that must not be exceeded.
24-Pin QFN
32-Pin QFN
48-Pin QFN
+ Power × 
16-Pin SOIC
16-pin SOIC
16-Pin QFN
16-pin QFN
24-pin QFN
32-pin QFN
48-pin QFN
32-Pin QFN
48-Pin QFN
Package
Package
Package
JA
[34]
[34]
[34]
.
Maximum Peak Temperature (T
Package Capacitance
Typical 
95 C/W
33 C/W
21 C/W
20 C/W
18 C/W
54 C/W
260 C
260 C
260 C
260 C
260 C
260 C
3.2 pF
3.3 pF
JA
[33]
C
)
Maximum Time above T
CY8C20x37/37S/47/47S/67/67S
30 seconds
30 seconds
30 seconds
30 seconds
30 seconds
30 seconds
C
– 5 C
Page 30 of 39

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