NG80386SX-33 AMD [Advanced Micro Devices], NG80386SX-33 Datasheet - Page 3

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NG80386SX-33

Manufacturer Part Number
NG80386SX-33
Description
High-Performance, Low-Power, Embedded Microprocessors
Manufacturer
AMD [Advanced Micro Devices]
Datasheet

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BLOCK DIAGRAM
FUNCTIONAL DESCRIPTION
True Static Operation
(Am386SXL/SXLV Only)
The Am386SXL/SXLV microprocessor incorporates a
true static design. Unlike dynamic circuit design, the
Am386SXL/SXLV device eliminates the minimum op-
erating frequency restriction. It may be clocked from its
maximum speed all the way down to 0 MHz (DC). Sys-
tem designers can use this feature to design portable
applications with long battery life.
Standby Mode (Am386SXL/SXLV Only)
The true static design of the Am386SXL/SXLV micro-
processor allows for a Standby Mode. At any operating
speed, the microprocessor will retain its state (i.e., the
contents of all its registers). By shutting off the clock
completely, the device enters Standby Mode. Since
power consumption is proportional to clock frequency,
operating power consumption is reduced as the fre-
quency is lowered. In Standby Mode, typical current
draw is reduced to less than 20 microamps at DC. Not
only does this feature save battery life, but it also sim-
ALU
* – On Am386SXLV only
Multiply/
Register
Shifter,
Divide
Barrel
Adder
File
Status
Flags
Protection
Test Unit
Effective Address Bus
Effective Address Bus
Control
ALU
Sequencing
Decode
Control
Control
ROM
and
Am386SX/SXL/SXLV Microprocessors Data Sheet
32
32
Segmentation Unit
Internal Control Bus
Dedicated ALU Bus
Descriptor
3-Decoded
Predecode
Registers
Instruction
Limit and
Instruction
Instruction
Attribute
Decoder
3-Input
Adder
Queue
PLA
F I N A L
Stream
32 Bit
Code
32
plifies the design of power-conscious portable applica-
tions in the following ways.
Lower Operating Icc
(Am386SXL/SXLV Only)
True static design also allows lower operating Icc when
operating at any speed.
Performance on Demand
(Am386SXL/SXLV Only)
The Am386SXL/SXLV microprocessor retains its state
at any speed from 0 MHz (DC) to its maximum operat-
ing speed. With this feature, system designers may
vary the operating speed of the system to extend the
battery life in portable systems.
Paging Unit
Eliminates the need for software in BIOS to save
and restore the contents of registers.
Allows simpler circuitry to control stopping of the
clock since the system does not need to know
the state of the processor.
Prefetcher/
Instruction
Attribute
Checker
Prefetch
16-Byte
Control
Queue
Cache
Adder
Page
Code
PLA
Limit
and
25
32
32
Bus Control
Prioritizer
Bus Size
Pipeline/
Address
Request
Control
ceivers
Trans-
Driver
MUX/
HOLD, INTR,
NMI, ERROR,
BUSY, RESET,
HLDA, FLT,
SMI*, IIBEN*
BHE, BLE,
A23-A1
M/IO, D/C,
W/R, LOCK,
ADS, NA,
READY,
SMIADS*,
SMIRDY*
D15-D0
3

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