MPC106ARX66CE MOTOROLA [Motorola, Inc], MPC106ARX66CE Datasheet - Page 10

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MPC106ARX66CE

Manufacturer Part Number
MPC106ARX66CE
Description
PCI Bridge/Memory Controller
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
Figure 4 provides the mode select input timing diagram for the 106.
1.4.2.3 Output AC Specifications
Table 8 provides the output AC timing specifications for 106 (shown in Table 5). Assume Vdd = AVdd =
3.3 ± 5% V DC, GND = 0 V DC, CL = 50 pF, and 0 T
are specified from the rising edge of the 60x bus clock (which is internally synchronized to SYSCLK). All
units are nanoseconds.
10
and IV INPUTS
60x Bus Clock
Group I, II, III,
MODE PINS
Group V and
VI INPUTS
SYSCLK
HRST
MPC106 PCI Bridge/Memory Controller Hardware Specifications
10c
Figure 4. Mode Select Input Timing Diagram
Figure 3. Input Timing Diagram
10a
VM = Midpoint Voltage (1.4 V)
10b
VM = Midpoint Voltage (1.4 V)
VM
j
VM
VM
105 °C. Processor and memory interface signals
11c
11a
11b

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