MC68HC12 MOTOROLA [Motorola, Inc], MC68HC12 Datasheet - Page 236
MC68HC12
Manufacturer Part Number
MC68HC12
Description
The MC68HC912DT128A microcontroller unit (MCU) is a 16-bit device composed of standard on-chip peripherals including a 16-bit central processing unit
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC12.pdf
(478 pages)
- Current page: 236 of 478
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Pulse Width Modulator
Technical Data
236
PWDTYx — PWM Channel Duty Registers
PWDTY0
PWDTY1
PWDTY2
PWDTY3
RESET:
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
1
and then write the counter forcing a new period to start with the new
period value.
Period = Channel-Clock-Period × (PWPER + 1)
Period = Channel-Clock-Period × (2 × PWPER)
Read and write anytime.
Left-Aligned-Output Mode (CENTR = 0):
Duty cycle = [(PWDTYx+1)/(PWPERx+1)] × 100%
Duty cycle = [(PWPERx−PWDTYx)/(PWPERx+1)] × 100%
Center-Aligned-Output Mode (CENTR = 1):
Duty cycle = [(PWPERx−PWDTYx)/PWPERx] × 100%
Duty cycle = [PWDTYx/PWPERx] × 100%
6
6
6
6
6
1
The value in each duty register determines the duty of the associated
PWM channel. When the duty value is equal to the counter value, the
output changes state. If the register is written while the channel is
enabled, the new value is held in a buffer until the counter rolls over
or the channel is disabled. Reading this register returns the most
recent value written.
If the duty register is greater than or equal to the value in the period
register, there will be no duty change in state. If the duty register is set
to $FF the output will always be in the state which would normally be
the state opposite the PPOLx value.
5
5
5
5
5
1
Pulse Width Modulator
4
4
4
4
4
1
3
3
3
3
3
1
2
2
2
2
2
1
MC68HC912DT128A — Rev 4.0
1
1
1
1
1
1
Bit 0
Bit 0
Bit 0
Bit 0
Bit 0
1
(CENTR = 0)
(CENTR = 1)
(PPOLx = 0)
(PPOLx = 1)
(PPOLx = 1)
(PPOLx = 0)
MOTOROLA
$0050
$0051
$0052
$0053
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