MC68HC12 MOTOROLA [Motorola, Inc], MC68HC12 Datasheet - Page 355

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MC68HC12

Manufacturer Part Number
MC68HC12
Description
The MC68HC912DT128A microcontroller unit (MCU) is a 16-bit device composed of standard on-chip peripherals including a 16-bit central processing unit
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
18.13.5 msCAN12 Bus Timing Register 1 (CBTR1)
MC68HC912DT128A — Rev 4.0
MOTOROLA
TSEG13 TSEG12 TSEG11 TSEG10 Time segment 1
CBTR1
$0103
RESET
0
0
0
0
1
.
.
W
R
0
0
0
0
1
.
.
SAMP
Bit 7
0
0
0
1
1
1
.
.
SAMP — Sampling
TSEG22 – TSEG10 — Time Segment
Time segment 1 (TSEG1) and time segment 2 (TSEG2) are
programmable as shown in
1. In this case PHASE_SEG1 must be at least 2 TimeQuanta.
Transmit point
TSEG22
Sample point
SYNC_SEG
This bit determines the number of samples of the serial bus to be
taken per bit time. If set three samples per bit are taken, the regular
one (sample point) and two preceding samples, using a majority rule.
For higher bit rates SAMP should be cleared, which means that only
one sample will be taken per bit.
Time segments within the bit time fix the number of clock cycles per
bit time, and the location of the sample point.
6
0
0 = One sample per bit.
1 = Three samples per bit
0
1
0
1
1
.
.
Table 18-7. Time segment values
16 Tq clock cycles
TSEG21
2 Tq clock cycles
3 Tq clock cycles
4 Tq clock cycles
1 Tq clock cycle
System expects transitions to occur on the bus during this period.
A node in transmit mode will transfer a new value to the CAN bus at
A node in receive mode will sample the bus at this point. If the three
5
0
this point.
samples per bit option is selected then this point marks the position
of the third sample.
MSCAN Controller
Table 18-6. Time segment syntax
.
.
TSEG20
4
0
Table
TSEG22 TSEG21 TSEG20 Time segment 2
(1)
TSEG13
0
0
1
.
.
.
18-7.
3
0
Programmer’s Model of Control Registers
0
0
1
.
.
TSEG12
2
0
0
1
1
.
.
TSEG11
1
0
MSCAN Controller
8 Tq clock cycles
2 Tq clock cycles
1 Tq clock cycle
Technical Data
TSEG10
.
.
Bit 0
0
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