PIC18F23K20 MICROCHIP [Microchip Technology], PIC18F23K20 Datasheet - Page 138
PIC18F23K20
Manufacturer Part Number
PIC18F23K20
Description
28/40/44-Pin Flash Microcontrollers with nanoWatt XLP Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18F23K20.pdf
(456 pages)
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PIC18F2XK20/4XK20
10.8
The output slew rate of each port is programmable to
select either the standard transition rate or a reduced
transition rate of 0.1 times the standard to minimize
EMI. The reduced transition time is the default slew
rate for all ports.
REGISTER 10-4:
DS41303G-page 138
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
U-0
—
2:
Port Slew Rate Control
These bits are not implemented on PIC18F2XK20 devices.
The slew rate of RA6 defaults to standard rate when the pin is used as CLKOUT.
Unimplemented: Read as ‘0’
SLRE: PORTE Slew Rate Control bit
1 = All outputs on PORTE slew at a limited rate
0 = All outputs on PORTE slew at the standard rate
SLRD: PORTD Slew Rate Control bit
1 = All outputs on PORTD slew at a limited rate
0 = All outputs on PORTD slew at the standard rate
SLRC: PORTC Slew Rate Control bit
1 = All outputs on PORTC slew at a limited rate
0 = All outputs on PORTC slew at the standard rate
SLRB: PORTB Slew Rate Control bit
1 = All outputs on PORTB slew at a limited rate
0 = All outputs on PORTB slew at the standard rate
SLRA: PORTA Slew Rate Control bit
1 = All outputs on PORTA slew at a limited rate
0 = All outputs on PORTA slew at the standard rate
U-0
—
SLRCON: SLEW RATE CONTROL REGISTER
W = Writable bit
‘1’ = Bit is set
U-0
—
SLRE
R/W-1
(1)
(1)
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
SLRD
R/W-1
(2)
(1)
R/W-1
SLRC
2010 Microchip Technology Inc.
x = Bit is unknown
R/W-1
SLRB
R/W-1
SLRA
bit 0
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