PIC18F23K20 MICROCHIP [Microchip Technology], PIC18F23K20 Datasheet - Page 203

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PIC18F23K20

Manufacturer Part Number
PIC18F23K20
Description
28/40/44-Pin Flash Microcontrollers with nanoWatt XLP Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet

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REGISTER 17-3:
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
Master mode
bit 7-0
10-Bit Slave mode: Most significant address byte
bit 7-3
bit 2-1
bit 0
10-Bit Slave mode: Least significant address byte
bit 7-0
7-Bit Slave mode
bit 7-1
bit 0
R/W-0
ADD7
ADD<7:0>: Baud Rate Clock Divider bits
SCL pin clock period = ((ADD<7:0> + 1) *4)/F
Not used: Unused for most significant address byte. Bit state of this register is a don’t care. Bit pattern
sent by master is fixed by I
compared by hardware and are not affected by the value in this register.
ADD<9:8>: Two most significant bits of 10-bit address
Not used: Unused in this mode. Bit state is a “don’t care”.
ADD<7:0>: Eight least significant bits of 10-bit address
ADD<7:1>: 7-bit address
Not used: Unused in this mode. Bit state is a “don’t care”.
R/W-0
ADD6
SSPADD: MSSP ADDRESS AND BAUD RATE REGISTER (I
W = Writable bit
‘1’ = Bit is set
R/W-0
ADD5
2
C specification and must be equal to ‘11110’. However, those bits are
R/W-0
ADD4
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
OSC
R/W-0
ADD3
PIC18F2XK20/4XK20
R/W-0
ADD2
x = Bit is unknown
2
R/W-0
ADD1
C MODE)
DS41303G-page 203
R/W-0
ADD0
bit 0

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