MC68HC705C4ACB MOTOROLA [Motorola, Inc], MC68HC705C4ACB Datasheet - Page 128

• Manufacturer Part Number: MC68HC705C4ACB
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

Serial Communications Interface (SCI)
Technical Data
128
Address:
TDRE — Transmit Data Register Empty Bit
TC — Transmission Complete Bit
RDRF — Receive Data Register Full Bit
Reset:
Read:
Write:
This clearable, read-only bit is set when the data in the SCDR
transfers to the transmit shift register. TDRE generates an interrupt
request if the TIE bit in SCCR2 is also set. Clear the TDRE bit by
reading the SCSR with TDRE set and then writing to the SCDR. Reset
sets the TDRE bit. Software must initialize the TDRE bit to logic 0 to
avoid an instant interrupt request when turning on the transmitter.
This clearable, read-only bit is set when the TDRE bit is set and no
data, preamble, or break character is being transmitted. TC generates
an interrupt request if the TCIE bit in SCCR2 is also set. Clear the TC
bit by reading the SCSR with TC set and then writing to the SCDR.
Reset sets the TC bit. Software must initialize the TC bit to logic 0 to
avoid an instant interrupt request when turning on the transmitter.
This clearable, read-only bit is set when the data in the receive shift
register transfers to the SCI data register. RDRF generates an
interrupt request if the RIE bit in SCCR2 is also set. Clear the RDRF
bit by reading the SCSR with RDRF set and then reading the SCDR.
Reset clears the RDRF bit.
1 = SCDR data transferred to transmit shift register
0 = SCDR data not transferred to transmit shift register
1 = No transmission in progress
0 = Transmission in progress
1 = Received data available in SCDR
0 = Received data not available in SCDR
Serial Communications Interface (SCI)
$0010
TDRE
Bit 7
1
Figure 10-8. SCI Status Register (SCSR)
= Unimplemented
TC
6
1
RDRF
5
0
MC68HC705C4A • MC68HSC705C4A — Rev. 3.0
IDLE
4
0
U = Unaffected
OR
3
0
NF
2
0
FE
1
0
MOTOROLA
Bit 0
U