MC68HC705C4ACB MOTOROLA [Motorola, Inc], MC68HC705C4ACB Datasheet - Page 129

• Manufacturer Part Number: MC68HC705C4ACB
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

MC68HC705C4A • MC68HSC705C4A — Rev. 3.0
MOTOROLA
IDLE — Receiver Idle Bit
OR — Receiver Overrun Bit
NF — Receiver Noise Flag
FE — Receiver Framing Error Bit
This clearable, read-only bit is set when 10 or 11 consecutive logic 1s
appear on the receiver input. IDLE generates an interrupt request if
the ILIE bit in SCCR2 is also set. Clear the IDLE bit by reading the
SCSR with IDLE set, and then reading the SCDR. Reset clears the
IDLE bit.
This clearable, read-only bit is set if the SCDR is not read before the
receive shift register receives the next word. OR generates an
interrupt request if the RIE bit in SCCR2 is also set. The data in the
shift register is lost, but the data already in the SCDR is not affected.
Clear the OR bit by reading the SCSR with OR set and then reading
the SCDR. Reset clears the OR bit.
This clearable, read-only bit is set when noise is detected in data
received in the SCI data register. Clear the NF bit by reading the
SCSR and then reading the SCDR. Reset clears the NF bit.
This clearable, read-only flag is set when a logic 0 is located where a
stop bit should be in the character shifted into the receive shift
register. If the received word causes both a framing error and an
overrun error, the OR bit is set and the FE bit is not set. Clear the FE
bit by reading the SCSR and then reading the SCDR. Reset clears the
FE bit.
1 = Receiver input idle
0 = Receiver input not idle
1 = Receiver shift register full and RDRF = 1
0 = No receiver overrun
1 = Noise detected in SCDR
0 = No noise detected in SCDR
1 = Framing error
0 = No framing error
Serial Communications Interface (SCI)
Serial Communications Interface (SCI)
SCI I/O Registers
Technical Data
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