LAN83C185_03 SMSC [SMSC Corporation], LAN83C185_03 Datasheet - Page 46

• Manufacturer Part Number: LAN83C185_03
• Description: High Performance Single Chip Low Power 10/100 Ethernet Physical Layer Transceiver
• Manufacturer: SMSC [SMSC Corporation]

Rev. 0.6 (12-12-03)
5.3
5.4
5.4.1
31.4:2
31.1
31.0
ADDRESS
The Management interface supports an interrupt capability that is not a part of the IEEE 802.3
specification. It generates an active low interrupt signal on the nINT output whenever certain events
are detected. Reading the Interrupt Source register (Register 29) shows the source of the interrupt,
and clears the interrupt output signal. The Interrupt Mask register (Register 30) enables for each
source to set (LOW) the nINT, by asserting the corresponding mask bit. The Mask bit does not mask
the source bit in register 29. At reset, all bits are masked (negated). The nINT is an asynchronous
output.
Carrier Sense
The carrier sense is output on CRS. CRS is a signal defined by the MII specification in the IEEE 802.3u
standard. The PHY asserts CRS based only on receive activity whenever the PHY is either in repeater
mode or full-duplex mode. Otherwise the PHY asserts CRS based on either transmit or receive activity.
The carrier sense logic uses the encoded, unscrambled data to determine carrier activity status. It
activates carrier sense with the detection of 2 non-contiguous zeros within any 10 bit span. Carrier
sense terminates if a span of 10 consecutive ones is detected before a /J/K/ Start-of Stream Delimiter
pair. If an SSD pair is detected, carrier sense is asserted until either /T/R/ End–of-Stream Delimiter
pair or a pair of IDLE symbols is detected. Carrier is negated after the /T/ symbol or the first IDLE. If
/T/ is not followed by /R/, then carrier is maintained. Carrier is treated similarly for IDLE followed by
some non-IDLE symbol.
Management Interrupt
Miscellaneous Functions
Speed Indication
Reserved
Scramble Disable
Table 5.52 Register 31 - PHY Special Control/Status (continued)
ENERGYON activated
Auto-Negotiate Complete
Remote Fault Detected
Link Status negated (not asserted)
Auto-Negotiation LP Acknowledge
Parallel Detection Fault
Auto-Negotiation Page Received
NAME
INTERRUPT SOURCE
High Performance Single Chip Low Power 10/100 Ethernet Physical Layer Transceiver (PHY)
HCDSPEED value:
[001]=10Mbps Half-duplex
[101]=10Mbps Full-duplex
[010]=100Base-TX Half-duplex
[110]=100Base-TX Full-duplex
Write as 0; ignore on Read
0 = enable data scrambling
1 = disable data scrambling,
DATASHEET
DESCRIPTION
38
SOURCE/MASK REG BIT #
7
6
5
4
3
2
1
RO
RW
RW
MODE
SMSC LAN83C185
DEFAULT
000
0
0
Datasheet