LAN9118_05 SMSC [SMSC Corporation], LAN9118_05 Datasheet
LAN9118_05
Manufacturer Part Number
LAN9118_05
Description
High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
Manufacturer
SMSC [SMSC Corporation]
Datasheet
1.LAN9118_05.pdf
(126 pages)
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PRODUCT FEATURES
Highlights
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Target Applications
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Key Benefits
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SMSC LAN9118
Optimized for the highest data-rate applications such
Efficient architecture with low CPU overhead;
Easily interfaces to most 32-bit and 16-bit embedded
Integrated PHY
Supports audio & video streaming over Ethernet:
Pin compatible with other members of LAN9118
Video distribution systems, multi-room PVR
High-end Cable, satellite, and IP set-top boxes
Digital video recorders
High definition televisions
Digital media clients/servers
Home gateways
Supports highest performance applications
Eliminates dropped packets
Minimizes CPU overhead
Reduces system cost and increases design flexibility
as high-definition video and multi-media applications
CPU’s
multiple high-definition (HD) MPEG2 streams
family (LAN9117, LAN9116 and LAN9115)
— Highest performing non-PCI Ethernet controller in the
— 32-bit interface with fast bus cycle times
— Burst-mode read support
— Internal buffer memory can store over 200 packets
— Supports automatic or host-triggered PAUSE and back-
— Supports Slave-DMA
— Interrupt Pin with Programmable Hold-off timer
— SRAM-like interface easily interfaces to most
— Low-cost, low--pin count non-PCI interface for
market
pressure flow control
embedded CPU’s or SoC’s
embedded designs
DATASHEET
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* Third-party brands and names are the property of their respective
owners.
Reduced Power Modes
Single chip Ethernet controller
Flexible address filtering modes
Integrated Ethernet PHY
High-Performance host bus interface
Miscellaneous features
3.3V Power Supply with 5V tolerant I/O
0 to 70°C
— Numerous power management modes
— Wake on LAN*
— Magic packet wakeup*
— Wakeup indicator event signal
— Link Status Change
— Fully compliant with IEEE 802.3/802.3u standards
— Integrated Ethernet MAC and PHY
— 10BASE-T and 100BASE-TX support
— Full- and Half-duplex support
— Full-duplex flow control
— Backpressure for half-duplex flow control
— Preamble generation and removal
— Automatic 32-bit CRC generation and checking
— Automatic payload padding and pad removal
— Loop-back modes
— One 48-bit perfect address
— 64 hash-filtered multicast addresses
— Pass all multicast
— Promiscuous mode
— Inverse filtering
— Pass all incoming with status report
— Disable reception of broadcast packets
— Auto-negotiation
— Automatic polarity detection and correction
— Simple, SRAM-like interface
— 32/16-bit data bus
— Large, 16Kbyte FIFO memory that can be allocated to
— One configurable host interrupt
— Low profile 100-pin TQFP package; green, lead free
— Integral 1.8V regulator
— General Purpose Timer
— Support for optional EEPROM
— Support for 3 status LEDs multiplexed with
LAN9118
High Performance
Single-Chip 10/100 Non-
PCI Ethernet Controller
RX or TX functions
package also availaible
Programmable GPIO signals
Revision 1.1 (05-17-05)
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