LAN9118_05 SMSC [SMSC Corporation], LAN9118_05 Datasheet - Page 17
LAN9118_05
Manufacturer Part Number
LAN9118_05
Description
High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
Manufacturer
SMSC [SMSC Corporation]
Datasheet
1.LAN9118_05.pdf
(126 pages)
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High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
Datasheet
SMSC LAN9118
PIN
NO.
NO.
PIN
69
95
6
5
NAME
EEPROM Clock,
GPO4 RX_DV,
Crystal 1
Crystal 2
RX_CLK
NAME
Reset
Table 2.4 Serial EEPROM Interface Signals (continued)
SYMBOL
RX_DV/RX_CLK
EECLK/GPO4/
Table 2.5 System and Power Signals
SYMBOL
nRESET
XTAL1
XTAL2
DATASHEET
BUFFER
TYPE
BUFFER
(PU)
TYPE
Oclk
lclk
17
IS
O8
NUM
PINS
NUM
PINS
1
1
1
1
DESCRIPTION
External 25MHz Crystal Input.
Can also be connected to single-
ended TTL oscillator. If this method is
implemented, XTAL2 should be left
unconnected.
External 25MHz Crystal output.
Active-low reset input. Resets all
logic and registers within the
LAN9118
with a weak internal pull-up
resistor. If nRESET is left
unconnected, the
rely on its internal power-on reset
circuitry
Note:
EEPROM Clock: Serial EEPROM
Clock pin.
General Purpose Output 4: This
pin can also function as a general-
purpose output, or it can be
configured to monitor the RX_DV or
RX_CLK signals on the internal MII
port. When configured as a GPO
signal, or as an RX_DV/RX_CLK
monitor, the EECS pin is deasserted
so as to never unintentionally access
the serial EEPROM. This signal
cannot function as a general-
purpose input.
The LAN9118 must always
be read at least once after
power-up, reset, or upon
return from a power-saving
state or write operations will
not function. See
3.11, "Detailed Reset
Description," on page 40
additional information
This signal is pulled high
DESCRIPTION
Revision 1.1 (05-17-05)
LAN9118
Section
will
for
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