PEB2085 SIEMENS [Siemens Semiconductor Group], PEB2085 Datasheet - Page 241

• Manufacturer Part Number: PEB2085
• Description: ISDN SubscribernAccess Controller
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

MRC1,0
MXE1,0
MXC1,0
4.3.19
Value after reset:
IDC
CFS
CI1E
SYN
SQR1-4
Semiconductor Group
7
S, Q Channel Receive Register
MR Bit Control (IOM Channel 1,0)
Determines the value of the MR bit:
0: MR always "1". In addition, the MDR1/MDR0 interrupt is blocked, except for the
1: MR internally controlled by the ISAC-S according to MONITOR channel
MONITOR Transmit Interrupt Enable (IOM channel 1,0)
MX Bit Control (IOM Channel 1,0)
Determines the value of the MX bit:
0: MX always "1".
1: MX internally controlled by the ISAC-S according to MONITOR channel
Read-Back of Programmed IDC Bit (see SQXR register)
Read-Back of Programmed CFS Bit (see SQXR register)
Read-Back of Programmed CI1E Bit (see SQXR register)
Synchronization State
Used in TE/LT-T mode only (pin M1 = 0).
The S/T receiver has synchronized to the received F
Received S/Q Bits
TE/LT-T mode (pin M1 = 0): Received S bits in frames 1, 6, 11 and 16,
respectively.
LT-S/NT mode (pin M1 = 1): Received F
respectively.
IDC
MONITOR interrupt status MDA1/0, MAB1/0 generation is enabled (1) or
masked (0).
protocol.
protocol. In addition, the MDR1/MDR0 interrupt is enabled for all received bytes
according to the MONITOR channel protocol (if MRE1 0 = 1).
first byte of a packet (if MRE1/0 = 1).
0X
CFS
H
CI1E
SYN
241
SQR1
SQRR
A
bits in frames 1, 6, 11 and 16,
SQR2
Read
SQR3
A
and M bits (1) or has not (0).
Register Description
SQR4
Address 3B
0
H