FDC37C665GT_07 SMSC [SMSC Corporation], FDC37C665GT_07 Datasheet - Page 121

• Manufacturer Part Number: FDC37C665GT_07
• Description: High-Performance Multi-Mode Parallel Port Super I/O Floppy Disk Controllers
• Manufacturer: SMSC [SMSC Corporation]

CR1
This register can only be accessed when the
FDC is in the Configuration Mode and after the
Note CR1_1: If the parallel port is configured for ECP or EPP modes, then PINTR is always active
BIT NO.
0,1
5,6
2
3
4
7
Parallel Port
Address
Parallel Port
Power
Parallel Port
Mode
IRQ Polarity
COM3,4
LOCK CRx
low, inactive hi-z independent of this bit.
BIT NAME
These bits are used to select the Parallel Port Address.
A high level on this bit, supplies power to the Parallel Port
(Default). A low level on this bit puts the Parallel Port in low
power mode.
Parallel Port Mode. A high level on this bit, sets the Parallel Port
for Printer Mode (Default). A low level on this bit enables the
Extended Parallel port modes. Refer to Bits 0 and 1 of CR4
A high level on this bit, programs IRQ3, IRQ4, FINTR and
(PINTR) for active high, inactive low (Default). A low level on
this bit programs IRQ3, IRQ4, FINTR and (PINTR) for active
low, inactive hi-Z. (See Note CR1_1)
Select the COM3 and COM4 address.
A high level on this bit enables the reading and writing of CR0-
CRF (Default). A low level on this bit disables the reading and
writing of CR0-CRF. Once set to 0, this bit can only be set to 1
by a hard reset or power-up reset.
1 0 Parallel Port Address
0 0 Disabled
0 1 3BCH
1 0 378H
1 1 278H (Default)
6 5 COM3 COM4
0 0 338H 238H (Default)
0 1 3E8H 2E8H
1 0 2E8H 2E0H
1 1 220H 228H
Table 48 - CR1
121
CSR has been initialized to 01H. The default
value of this register after power up is 9FH.
DESCRIPTION