MFRC52201HN1/TRAYB NXP [NXP Semiconductors], MFRC52201HN1/TRAYB Datasheet - Page 62
MFRC52201HN1/TRAYB
Manufacturer Part Number
MFRC52201HN1/TRAYB
Description
Contactless reader IC
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.MFRC52201HN1TRAYB.pdf
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NXP Semiconductors
MFRC522_33
Product data sheet
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9.3.4.6 TestBusReg register
9.3.4.7 AutoTestReg register
Table 126. TestPinValueReg register bit descriptions
Shows the status of the internal test bus.
Table 127. TestBusReg register (address 35h); reset value: xxh bit allocation
Table 128. TestBusReg register bit descriptions
Controls the digital self-test.
Table 129. AutoTestReg register (address 36h); reset value: 40h bit allocation
Bit
7
6 to 1 TestPinValue
0
Bit
Symbol
Access
Bit
7 to 0
Bit
Symbol
Access
Symbol
UseIO
[5:0]
reserved
reserved
Symbol
TestBus[7:0]
7
7
-
AmpRcv
Value Description
1
-
-
R/W
Rev. 3 — 26 October 2009
6
6
Description
shows the status of the internal test bus
the test bus is selected using the TestSel2Reg register; see
Section 16.1 on page 79
enables the I/O functionality for the test port when one of the serial
interfaces is used
the input/output behavior is defined by value TestPinEn[5:0] in the
TestPinEnReg register
the value for the output behavior is defined by TestPinValue[5:0]
defines the value of the test port when it is used as I/O and each
output must be enabled by TestPinEn[5:0] in the TestPinEnReg
register
Remark: Reading the register indicates the status of pins D6 to D1
if the UseIO bit is set to logic 1. If the UseIO bit is set to logic 0, the
value of the TestPinValueReg register is read back.
reserved for future use
112133
5
5
RFT
-
4
TestBus[7:0]
4
R
3
3
2
2
SelfTest[3:0]
Contactless reader IC
R/W
MFRC522
© NXP B.V. 2009. All rights reserved.
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