MC68HC908AP64_07 FREESCALE [Freescale Semiconductor, Inc], MC68HC908AP64_07 Datasheet - Page 106

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MC68HC908AP64_07

Manufacturer Part Number
MC68HC908AP64_07
Description
Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
System Integration Module (SIM)
The LDA opcode is prefetched by both the INT1 and INT2 RTI instructions. However, in the case of the
INT1 RTI prefetch, this is a redundant operation.
7.5.1.2 SWI Instruction
The SWI instruction is a non-maskable instruction that causes an interrupt regardless of the state of the
interrupt mask (I bit) in the condition code register.
7.5.2 Interrupt Status Registers
The flags in the interrupt status registers identify maskable interrupt sources.
interrupt sources and the interrupt status register flags that they set. The interrupt status registers can be
useful for debugging.
106
To maintain compatibility with the M6805 Family, the H register is not
pushed on the stack during interrupt entry. If the interrupt service routine
modifies the H register or uses the indexed addressing mode, software
should save the H register and then restore it prior to exiting the routine.
A software interrupt pushes PC onto the stack. A software interrupt does
not push PC – 1, as a hardware interrupt does.
INT1
INT2
Figure 7-11
MC68HC908AP Family Data Sheet, Rev. 4
CLI
LDA
PSHH
PULH
RTI
PSHH
PULH
RTI
#$FF
.
Interrupt Recognition Example
NOTE
NOTE
INT1 INTERRUPT SERVICE ROUTINE
INT2 INTERRUPT SERVICE ROUTINE
BACKGROUND
ROUTINE
Table 7-3
Freescale Semiconductor
summarizes the

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