MC68HC908AP64_07 FREESCALE [Freescale Semiconductor, Inc], MC68HC908AP64_07 Datasheet - Page 97

• Manufacturer Part Number: MC68HC908AP64_07
• Description: Microcontrollers
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Chapter 7
System Integration Module (SIM)
7.1 Introduction
This section describes the system integration module (SIM). Together with the CPU, the SIM controls all
MCU activities. A block diagram of the SIM is shown in
input/output (I/O) registers. The SIM is a system state controller that coordinates CPU and exception
timing. The SIM is responsible for:
Table 7-1
Freescale Semiconductor
CGMVCLK, CGMPCLK
•
•
•
•
•
Bus clock generation and control for CPU and peripherals:
–
–
Master reset control, including power-on reset (POR) and COP timeout
Interrupt control:
–
–
–
CPU enable/disable timing
Modular architecture expandable to 128 interrupt sources
Signal Name
CGMXCLK
CGMOUT
PORRST
shows the internal signal names used in this section.
Stop/wait/reset/break entry and recovery
Internal clock control
Acknowledge timing
Arbitration control timing
Vector address generation
ICLK
IRST
R/W
IDB
IAB
Internal oscillator clock
Selected oscillator clock from oscillator module
PLL output and the divided PLL output
CGMPCLK-based or oscillator-based clock output from CGM module
(Bus clock = CGMOUT ÷ 2)
Internal address bus
Internal data bus
Signal from the power-on reset module to the SIM
Internal reset signal
Read/write signal
Table 7-1. Signal Name Conventions
MC68HC908AP Family Data Sheet, Rev. 4
Figure
Description
7-1.
Figure 7-2
is a summary of the SIM
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