MC68HC908AP64_07 FREESCALE [Freescale Semiconductor, Inc], MC68HC908AP64_07 Datasheet - Page 47

• Manufacturer Part Number: MC68HC908AP64_07
• Description: Microcontrollers
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

2.5.7 FLASH Block Protect Register
The FLASH block protect register is implemented as an 8-bit I/O register. The value in this register
determines the starting address of the protected range within the FLASH memory.
BPR[7:0] — FLASH Block Protect Bits
Freescale Semiconductor
BPR[7:1] represent bits [15:9] of a 16-bit memory address. Bits [8:0] are logic 0’s.
BPR0 is used only for BPR[7:0] = $FF, for no block protection.
The resultant 16-bit address is used for specifying the start address of the FLASH memory for block
protection. The FLASH is protected from this start address to the end of FLASH memory, at $FFFF.
With this mechanism, the protect start address can be X000, X200, X400, X0600, X800, XA00, XC00,
or XE00 (at page boundaries — 512 bytes) within the FLASH memory.
Examples of protect start address:
Address:
and so on...
1. Except for the mask option register ($FFCF) and the 48-byte user vectors
Reset:
Read:
Write:
$FC or $FD or $FE
Start address of FLASH block protect
($FFD0–$FFFF). These FLASH locations are always protected.
(1111 1101x)
(0000 101x)
(0000 110x)
$0C or $0D
$0A or $0B
$FA or $FB
$00 to $09
BPR[7:0]
$FF
$FE09
BPR7
Bit 7
0
Figure 2-5. FLASH Block Protect Register (FLBPR)
Table 2-2 FLASH Block Protect Range
BPR6
6
0
MC68HC908AP Family Data Sheet, Rev. 4
BPR5
5
0
The entire FLASH memory is NOT protected.
The entire FLASH memory is protected.
BPR4
4
0
BPR[7:1]
Protected Range
$FFCF to $FFFF
$0C00 to $FFFF
$0A00 to $FFFF
$FA00 to $FFFF
BPR3
3
0
16-bit memory address
BPR2
0 0 0 0 0 0 0 0 0
2
0
BPR1
1
0
(1)
BPR0
Bit 0
0
FLASH Memory
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