MC68HC908AP64_07 FREESCALE [Freescale Semiconductor, Inc], MC68HC908AP64_07 Datasheet - Page 187

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MC68HC908AP64_07

Manufacturer Part Number
MC68HC908AP64_07
Description
Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
12.5.2.2 Character Transmission
During an SCI transmission, the transmit shift register shifts a character out to the TxD pin. The IRSCI
data register (IRSCDR) is the write-only buffer between the internal data bus and the transmit shift
register. To initiate an SCI transmission:
At the start of a transmission, transmitter control logic automatically loads the transmit shift register with
a preamble of logic 1s. After the preamble shifts out, control logic transfers the IRSCDR data into the
transmit shift register. A logic 0 start bit automatically goes into the least significant bit position of the
transmit shift register. A logic 1 stop bit goes into the most significant bit position.
Freescale Semiconductor
BUS CLOCK
CGMXCLK
1. Enable the SCI by writing a logic 1 to the enable SCI bit (ENSCI) in IRSCI control register 1
2. Enable the transmitter by writing a logic 1 to the transmitter enable bit (TE) in IRSCI control register
3. Clear the SCI transmitter empty bit by first reading IRSCI status register 1 (IRSCS1) and then
4. Repeat step 3 for each subsequent transmission.
(IRSCC1).
2 (IRSCC2).
writing to the IRSCDR.
SL = 0 => X = A
SL = 1 => X = B
A
B
CKS
SL
X
SCP1
SCP0
SCR1
SCR2
SCR0
SCALER
PRE-
MC68HC908AP Family Data Sheet, Rev. 4
DIVIDER
BAUD
Figure 12-7. SCI Transmitter
PEN
PTY
÷ 16
GENERATION
PARITY
DMATE
DMATE
SCTIE
SCTE
DMATE
SCTE
SCTIE
TC
TCIE
T8
M
H
8
SCTIE
7
SCTE
TCIE
TC
SCI DATA REGISTER
6
SHIFT REGISTER
INTERNAL BUS
TRANSMIT
5
11-BIT
4
CONTROL LOGIC
TRANSMITTER
3
2
1
SCI Functional Description
LOOPS
ENSCI
SBK
TE
0
L
SCI_TxD
187

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