MC68HC908AS60ACFN FREESCALE [Freescale Semiconductor, Inc], MC68HC908AS60ACFN Datasheet - Page 224

• Manufacturer Part Number: MC68HC908AS60ACFN
• Description: M68HC08 Microcontrollers
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Serial Peripheral Interface (SPI)
MODFEN — Mode Fault Enable Bit
SPR1 and SPR0 — SPI Baud Rate Select Bits
Use this formula to calculate the SPI baud rate:
224
For an idle master or idle slave that has no data loaded into its transmit buffer, the SPTE will be set
again within two bus cycles since the transmit buffer empties into the shift register. This allows the user
to queue up a 16-bit value to send. For an already active slave, the load of the shift register cannot
occur until the transmission is completed. This implies that a back-to-back write to the transmit data
register is not possible. The SPTE indicates when the next write can occur.
Reset sets the SPTE bit.
This read/write bit, when set to 1, allows the MODF flag to be set. If the MODF flag is set, clearing the
MODFEN does not clear the MODF flag. If the SPI is enabled as a master and the MODFEN bit is low,
then the SS pin is available as a general-purpose I/O.
If the MODFEN bit is set, then this pin is not available as a general purpose I/O. When the SPI is
enabled as a slave, the SS pin is not available as a general-purpose I/O regardless of the value of
MODFEN. (See
If the MODFEN bit is low, the level of the SS pin does not affect the operation of an enabled SPI
configured as a master. For an enabled SPI configured as a slave, having MODFEN low only prevents
the MODF flag from being set. It does not affect any other part of SPI operation. (See
Fault
In master mode, these read/write bits select one of four baud rates as shown in
SPR0 have no effect in slave mode. Reset clears SPR1 and SPR0.
1 = Transmit data register empty
0 = Transmit data register not empty
where:
Error).
CGMOUT = base clock output of the clock generator module (CGM),
BD = baud rate divisor
see
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
Chapter 10 Clock Generator Module
19.12.4 SS (Slave
Baud rate
Table 19-5. SPI Master Baud Rate Selection
SPR1:SPR0
00
01
10
11
=
Select)).
CGMOUT
------------------------- -
2
×
BD
Baud Rate Divisor (BD)
(CGM).
128
32
2
8
Table
Freescale Semiconductor
19-5. SPR1 and
19.6.2 Mode