MC68HC908AS60ACFN FREESCALE [Freescale Semiconductor, Inc], MC68HC908AS60ACFN Datasheet - Page 289

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MC68HC908AS60ACFN

Manufacturer Part Number
MC68HC908AS60ACFN
Description
M68HC08 Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
23.13.3 MSCAN08 Bus Timing Register 0
SJW1 and SJW0 — Synchronization Jump Width
BRP5–BRP0 — Baud Rate Prescaler
Freescale Semiconductor
The synchronization jump width (SJW) defines the maximum number of time quanta (T
by which a bit may be shortened, or lengthened, to achieve resynchronization on data transitions on
the bus (see
These bits determine the time quanta (T
according to
Address:
The CBTR0 register can be written only if the SFTRES bit in the MSCAN08
module control register is set.
BRP5
Reset:
Table
Read:
Table
Write:
0
0
0
0
1
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
:
:
23-7.
23-6).
$0502
SJW1
Bit 7
BRP4
0
0
0
0
0
1
SJW1
:
:
Figure 23-17. Bus Timing Register 0 (CBTR0)
0
0
1
1
Table 23-6. Synchronization Jump Width
SJW0
6
0
BRP3
Table 23-7. Baud Rate Prescaler
0
0
0
0
1
:
:
BRP5
SJW0
5
0
q
BRP2
0
1
0
1
) clock, which is used to build up the individual bit timing,
0
0
0
0
1
:
:
NOTE
BRP4
4
0
BRP1
Synchronization Jump Width
0
0
1
1
1
:
:
BRP3
3
0
BRP0
1 T
2 T
3 T
4 T
0
1
0
1
1
:
:
q
q
q
q
Programmer’s Model of Control Registers
cycle
cycle
cycle
cycle
BRP2
2
0
Prescaler Value (P)
BRP1
1
0
64
1
2
3
4
:
:
BRP0
Bit 0
0
q
) clock cycles
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