MC68HC908QY2 MOTOROLA [Motorola, Inc], MC68HC908QY2 Datasheet - Page 145
MC68HC908QY2
Manufacturer Part Number
MC68HC908QY2
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908QY2.pdf
(230 pages)
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10.10.4 TIM Channel Status and Control Registers
MOTOROLA
MC68HC908QY4•MC68HC908QT4•MC68HC908QY2•MC68HC908QT2•MC68HC908QY1•MC68HC908QT1
Address: $0025
Address: $0028
Each of the TIM channel status and control registers does the following:
CHxF — Channel x Flag Bit
Reset:
Reset:
Read:
Read:
Write:
Write:
•
•
•
•
•
•
•
•
When channel x is an input capture channel, this read/write bit is set
when an active edge occurs on the channel x pin. When channel x is
an output compare channel, CHxF is set when the value in the TIM
counter registers matches the value in the TIM channel x registers.
Flags input captures and output compares
Enables input capture and output compare interrupts
Selects input capture, output compare, or PWM operation
Selects high, low, or toggling output on output compare
Selects rising edge, falling edge, or any edge as the active input
capture trigger
Selects output toggling on TIM overflow
Selects 0% and 100% PWM duty cycle
Selects buffered or unbuffered output compare/PWM operation
CH0F
CH1F
Bit 7
Bit 7
0
0
0
0
Figure 10-7. TIM Channel Status and Control
Timer Interface Module (TIM)
TSC0
TSC1
= Unimplemented
CH0IE
CH1IE
6
0
6
0
Registers (TSC0:TSC1)
MS0B
5
0
5
0
0
MS0A
MS1A
4
0
4
0
ELS0B
ELS1B
3
0
3
0
Timer Interface Module (TIM)
ELS0A
ELS1A
2
0
2
0
Input/Output Registers
TOV0
TOV1
1
0
1
0
CH0MAX
CH1MAX
Bit 0
Bit 0
0
0
145
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